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Semiconductor Electronics

Questions
677
MHT CET
251
JEE Main
259
NEET
167
Years
1988–2026
0 of 677 attemptedPick an answer to see the solution

Q1MHT CET 2026 · 15 MAY · SHIFT 1Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

In semiconductors, at room temperature the

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Answer: (a)

  1. In a semiconductor the band gap is small (about 1 eV1\text{ eV}).
  2. At room temperature some electrons get thermal energy to jump from the valence band to the conduction band.
  3. They leave holes behind, so the valence band is partially empty and the conduction band is partially filled.
  4. So the answer is (a).
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Q2MHT CET 2026 · 16 APR · SHIFT 2Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

Electrical conductivity of insulators is

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Answer: (c)

  1. Insulators have a very large band gap (Eg>3 eVE_g > 3\text{ eV}), so almost no electrons reach the conduction band.
  2. A very few electrons can still be excited, so conductivity is not exactly zero but extremely small.
  3. So the answer is (c) extremely small.
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Q3MHT CET 2026 · 11 APR · SHIFT 2Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

In energy band diagram of insulators, a band gap and the conduction band is respectively

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Answer: (a)

  1. In an insulator the band gap is very large, Eg>3 eVE_g > 3\text{ eV}.
  2. Thermal energy cannot lift electrons across it, so the conduction band is empty.
  3. So the answer is (a) very high, empty.
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Q4MHT CET 2026 · 13 MAY · SHIFT 1Medium

Energy Bands in Solids · Conductors, insulators & semiconductors

There is no hole current in good conductors because they

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Answer: (b)

  1. A hole forms only when an electron leaves an otherwise filled valence band across a gap.
  2. In good conductors the valence and conduction bands overlap, so there is no gap and no holes are created.
  3. So the answer is (b).
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Q5MHT CET 2024 · 10 MAY · SHIFT 2Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

In semiconductors at room temperature,

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Answer: (d)

  1. Small band gap (∼1 eV\sim 1\text{ eV}) lets some valence electrons jump to the conduction band at room temperature.
  2. This leaves holes in the valence band (partially empty) and electrons in the conduction band (partially filled).
  3. So the answer is (d).
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Q6MHT CET 2024 · 2 MAY · SHIFT 1Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

In semiconductors at room temperature,

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Answer: (c)

  1. At room temperature thermal energy excites some electrons across the small gap of a semiconductor.
  2. The conduction band becomes partially filled and the valence band partially empty (holes).
  3. So the answer is (c).
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Q7MHT CET 2023 · 14 MAY · SHIFT 1Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

In semiconductors at room temperature,

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Answer: (c)

  1. At room temperature some valence electrons cross the small band gap into the conduction band.
  2. So the conduction band is partially filled and the valence band partially empty.
  3. So the answer is (c).
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Q8MHT CET 2023 · 11 MAY · SHIFT 1Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

In energy band diagram of insulators, a band gap and the conduction band is respectively

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Answer: (c)

  1. Insulators have a very large band gap (Eg>3 eVE_g > 3\text{ eV}).
  2. No electrons can cross it, so the conduction band is empty.
  3. So the answer is (c) very high and empty.
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Q9MHT CET 2023 · 10 MAY · SHIFT 1Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

In insulators

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Answer: (b)

  1. In an insulator all valence electrons are tightly bound, so the valence band is completely filled.
  2. The large gap keeps electrons from reaching the conduction band, so it stays empty.
  3. So the answer is (b).
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Q10NEET 2023Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

On the basis of electrical conductivity, which one of the following materials has the smallest resistivity?

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Answer: (b)

  1. Resistivity is smallest for a good conductor.
  2. Silver is a metal (best conductor); Ge and Si are semiconductors; glass is an insulator.
  3. So the answer is (b) Silver.
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Q11MHT CET 2021 · 24 SEP · SHIFT 2Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

Choose the correct statement. In conductors

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Answer: (a)

  1. In conductors (metals) the valence and conduction bands overlap; there is no band gap.
  2. So a large number of free electrons is always available for conduction.
  3. So the answer is (a).
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Q12MHT CET 2021 · 22 SEP · SHIFT 2Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

Choose the correct statement. In semiconductors valance band and conduction band

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Answer: (b)

  1. Semiconductors have a small band gap, about 1 eV1\text{ eV} (Si 1.1 eV1.1\text{ eV}, Ge 0.7 eV0.7\text{ eV}).
  2. Large gap means insulator; overlapping bands means conductor.
  3. So the answer is (b) separated by a small energy gap.
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Q13MHT CET 2021 · 20 SEP · SHIFT 2Easy

Energy Bands in Solids · Conductors, insulators & semiconductors

In the case of insulators, a band gap and conduction band is respectively

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Answer: (a)

  1. Insulators: band gap very large (>3 eV> 3\text{ eV}).
  2. Electrons cannot cross it, so the conduction band is empty.
  3. So the answer is (a) very high, empty.
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Q14MHT CET 2021 · 22 SEP · SHIFT 1Medium

Energy Bands in Solids · Conductors, insulators & semiconductors

Choose the FALSE statement from the following.

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Answer: (b)

  1. (a) True: in conductors the bands generally overlap.
  2. (b) False: resistivity of a semiconductor decreases as temperature rises (more electron-hole pairs).
  3. (c) True: conductivity increases with temperature.
  4. (d) True: Eg∼10 eVE_g \sim 10\text{ eV} means an insulator.
  5. So the false statement is (b).
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Q15NEET 2012 · AIPMT · PRELIMSMedium

Energy Bands in Solids · Conductors, insulators & semiconductors

C and Si both have same lattice structure; having 4 bonding electrons in each. However, C is insulator where as Si is intrinsic semiconductor. This is because

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Answer: (c)

  1. C (1s22s22p21s^2 2s^2 2p^2) has its four bonding electrons in the 2nd orbit; Si (…3s23p2\ldots 3s^2 3p^2) has them in the 3rd orbit.
  2. Electrons in the 2nd orbit are closer to the nucleus and more tightly bound, so the band gap of C (about 5.4 eV5.4\text{ eV}) is much larger than that of Si (1.1 eV1.1\text{ eV}).
  3. Hence C is an insulator and Si a semiconductor.
  4. So the answer is (c).
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Q16JEE Main 2007 · AIEEEMedium

Energy Bands in Solids · Conductors, insulators & semiconductors

Carbon, silicon and germanium have four valence electrons each. At room temperature which one of the following statements is most appropriate?

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Answer: (a)

  1. Band gaps: C ≈5.4 eV\approx 5.4\text{ eV}, Si 1.1 eV1.1\text{ eV}, Ge 0.7 eV0.7\text{ eV}; kT≈0.025 eVkT \approx 0.025\text{ eV} at room temperature.
  2. Small gaps of Si and Ge allow a significant number of electrons to be thermally excited; the large gap of C allows almost none.
  3. So the answer is (a).
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Q17JEE Main 2006 · AIEEEMedium

Energy Bands in Solids · Band formation & band gap

If the lattice constant of this semiconductor is decreased, then which of the following is correct?

Figure

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Answer: (c)

  1. In the figure EcE_c and EvE_v are the widths of the conduction and valence bands, EgE_g is the gap between them.
  2. Smaller lattice constant means atoms are closer, so their wave functions overlap more.
  3. Greater overlap spreads each level over a wider range: EcE_c and EvE_v increase.
  4. Wider bands come closer to each other, so the gap EgE_g decreases.
  5. This gives (b); the answer key gives (c).
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Q18NEET 2005 · AIPMTEasy

Energy Bands in Solids · Conductors, insulators & semiconductors

Choose the only false statement from the following.

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Answer: (c)

  1. (a) True: in conductors the bands overlap.
  2. (b) True: Eg∼10 eVE_g \sim 10\text{ eV} is far above 3 eV3\text{ eV}, so such substances are insulators.
  3. (c) False: as TT rises more electron-hole pairs form, so resistivity of a semiconductor decreases.
  4. (d) True: conductivity increases with temperature.
  5. So the false statement is (c).
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Q19NEET 2005 · AIPMTEasy

Energy Bands in Solids · Conductors, insulators & semiconductors

Carbon, silicon and germanium atoms have four valence electrons each. Their valence and conduction bands are separated by energy band gaps represented by (Eg)C, (Eg)si and (Eg)Ge respectively. Which one of the following relationships is true in their case?

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Answer: (a)

  1. Band gaps: carbon (diamond) Eg≈5.4 eVE_g \approx 5.4\text{ eV}, Si 1.1 eV1.1\text{ eV}, Ge 0.7 eV0.7\text{ eV}.
  2. So (Eg)C>(Eg)Si>(Eg)Ge(E_g)_C > (E_g)_{Si} > (E_g)_{Ge}.
  3. So the answer is (a) (Eg)C>(Eg)Si(E_g)_C > (E_g)_{Si}.
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Q20JEE Main 2005 · AIEEEMedium

Energy Bands in Solids · Band formation & band gap

The electrical conductivity of a semiconductor increases when electromagnetic radiation of wavelength shorter than 2480 nm2480\text{ nm} is incident on it. The band gap in (eV)(\text{eV}) for the semiconductor is

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Answer: (d)

  1. Conductivity rises only when photon energy ≥Eg\ge E_g, so Eg=hcλmaxE_g = \dfrac{hc}{\lambda_{max}}.
  2. Eg(eV)=1240λ(nm)=12402480E_g(\text{eV}) = \dfrac{1240}{\lambda(\text{nm})} = \dfrac{1240}{2480}
  3. Eg=0.5 eVE_g = 0.5\text{ eV}
  4. So the answer is (d) 0.5 eV0.5\text{ eV}.
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Q21JEE Main 2004 · AIEEEEasy

Energy Bands in Solids · Band formation & band gap

The manifestation of band structure in solids is due to

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Answer: (b)

  1. When atoms come together in a solid, their identical energy levels cannot hold the same electrons in the same state.
  2. Pauli's exclusion principle forces each level to split into many closely spaced levels, which form a band.
  3. So the answer is (b) Pauli's exclusion principle.
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Q22NEET 2004 · AIPMTEasy

Energy Bands in Solids · Conductors, insulators & semiconductors

In semiconductors at a room temperature

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Answer: (a)

  1. At room temperature some electrons cross the small gap of a semiconductor.
  2. Valence band becomes partially empty (holes) and conduction band partially filled.
  3. So the answer is (a).
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Q23JEE Main 2002 · AIEEEEasy

Energy Bands in Solids · Conductors, insulators & semiconductors

The energy band gap is maximum in

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Answer: (c)

  1. Metals and superconductors: bands overlap, Eg=0E_g = 0.
  2. Semiconductors: Eg≈1 eVE_g \approx 1\text{ eV}; insulators: Eg>3 eVE_g > 3\text{ eV}.
  3. So the answer is (c) insulator.
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Q24MHT CET 2026 · 14 MAY · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Intrinsic semiconductors

In an intrinsic semiconductor, at any ordinary temperature, the correct relation between the number of electrons per unit volume (nen_e) and number of holes per unit volume (nhn_h) is

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Answer: (a)

  1. In an intrinsic semiconductor every broken covalent bond gives one free electron and one hole.
  2. So ne=nh=nin_e = n_h = n_i (non-zero at ordinary temperature).
  3. So the answer is (a) ne=nhn_e = n_h.
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Q25MHT CET 2026 · 18 APR · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Intrinsic semiconductors

For intrinsic semiconductor, if nhn_h and nen_e represent the number of holes per unit volume and the number of free electrons per unit volume respectively then

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Answer: (c)

  1. Each electron that leaves a bond in a pure semiconductor leaves one hole behind.
  2. So nh=nen_h = n_e.
  3. So the answer is (c).
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Q26MHT CET 2026 · 11 APR · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · Intrinsic semiconductors

When the conductivity of a semiconductor is only due to breaking of covalent bonds, the semiconductor is called

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Answer: (b)

  1. Conduction only from breaking of covalent bonds means no impurity carriers are present.
  2. A pure (undoped) semiconductor is called intrinsic.
  3. So the answer is (b) intrinsic.
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Q27MHT CET 2026 · 19 MAY · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

In the energy band diagram of a p-type semiconductor, the "Acceptor Energy Level" is located

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Answer: (d)

  1. A trivalent acceptor atom needs one extra electron to complete its bonds.
  2. Its empty level lies in the gap, just above the valence band (about 0.010.01 to 0.05 eV0.05\text{ eV}), so valence electrons easily jump into it, leaving holes.
  3. So the answer is (d) just above the valence band.
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Q28MHT CET 2026 · 15 MAY · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

At room temperature, a p-type semiconductor has

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Answer: (a)

  1. A p-type semiconductor is doped with a trivalent impurity that creates holes.
  2. So holes are majority carriers and electrons are minority carriers.
  3. So the answer is (a) large number of holes and few electrons.
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Q29MHT CET 2026 · 20 APR · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

In the band structure of n-type semiconductor, the free electrons donated by impurity atoms occupy energy levels in

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Answer: (c)

  1. The fifth electron of a pentavalent donor is loosely bound.
  2. Its energy level (donor level) lies in the band gap just below the conduction band, so it is easily excited into the conduction band.
  3. So the answer is (c).
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Q30MHT CET 2026 · 19 APR · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

In n-type semiconductor

A) pentavalent impurity are dopants and holes are majority carriers.

B) trivalent impurity are dopants and electrons are minority carriers.

C) pentavalent impurity are dopants and electrons are majority carriers.

D) trivalent impurity are dopants and holes are majority carriers.

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Answer: (b)

  1. n-type: doped with a pentavalent impurity (P, As, Sb), which donates extra electrons.
  2. So electrons are majority carriers and holes minority carriers; only statement C fits.
  3. So the answer is (b) C.
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Q31MHT CET 2026 · 16 APR · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

When a small amount of impurity atoms are added to a semiconductor then generally its resistivity

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Answer: (b)

  1. Doping adds a large number of extra carriers (electrons or holes).
  2. Conductivity σ=e(neμe+nhμh)\sigma = e(n_e\mu_e + n_h\mu_h) increases, so resistivity decreases.
  3. So the answer is (b) decreases.
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Q32MHT CET 2026 · 12 MAY · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Mass action law

Pure silicon crystal at 300300K has equal electron and hole concentration 2×10162 \times 10^{16} per m3{}^{3}. Doping by indium increases hole concentration to 4×10224 \times 10^{22} per m3{}^{3}. Electron concentration in doped silicon is

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Answer: (b)

  1. Mass action law: nenh=ni2n_e n_h = n_i^2
  2. ne=(2×1016)24×1022=4×10324×1022n_e = \dfrac{(2\times10^{16})^2}{4\times10^{22}} = \dfrac{4\times10^{32}}{4\times10^{22}}
  3. ne=1010 m−3n_e = 10^{10}\ \text{m}^{-3}
  4. So the answer is (b) 1010/m310^{10}/\text{m}^3.
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Q33MHT CET 2026 · 13 APR · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Mass action law

A pure silicon crystal at temperature 300300 K has electron and hole concentration (nin_i) 101610^{16} per m3{}^{3} each and 102110^{21} phosphorus atoms (nen_e) are added per cubic metre. The new hole concentration in silicon crystal is

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Answer: (d)

  1. Each P atom gives one electron, so ne≈1021 m−3n_e \approx 10^{21}\ \text{m}^{-3} (much larger than nin_i).
  2. Mass action law: nh=ni2ne=(1016)21021n_h = \dfrac{n_i^2}{n_e} = \dfrac{(10^{16})^2}{10^{21}}
  3. nh=1011 m−3n_h = 10^{11}\ \text{m}^{-3}
  4. So the answer is (d) 101110^{11} per m3^3.
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Q34MHT CET 2026 · 19 MAY · SHIFT 1Medium

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

The band diagrams of three semiconductors p, n and intrinsic are given in the figures (1), (2) and (3). C and V are the conduction and valence bands and EFE_F is the Fermi level. Figures, from (2),(1) and (3) respectively represent the type of semiconductors as

Figure

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Answer: (b)

  1. Intrinsic: EFE_F lies midway between C and V. n-type: EFE_F near C. p-type: EFE_F near V.
  2. Figure (2): EFE_F just above V, so p-type.
  3. Figure (1): EFE_F in the middle, so intrinsic. Figure (3): EFE_F just below C, so n-type.
  4. So (2), (1), (3) are p, intrinsic and n: the answer is (b).
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Q35MHT CET 2025 · 23 APR · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

Which of the following statements is TRUE for n-type semiconductor?

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Answer: (c)

  1. n-type: pentavalent dopant gives extra electrons, so electrons are majority carriers.
  2. Holes are then minority carriers.
  3. So the answer is (c).
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Q36MHT CET 2025 · 22 APR · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

In n-type semiconductor, free electrons donated by the impurity atoms occupy energy levels in

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Answer: (c)

  1. The donor electron of a pentavalent impurity is loosely bound.
  2. Its level lies in the band gap, just below the conduction band.
  3. So the answer is (c).
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Q37MHT CET 2025 · 22 APR · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · Mass action law

In a pure silicon crystal electron-hole concentration is 101610^{16} per m3\text{m}^{3} at 301 K. Now 102110^{21} atoms of phosphorus are added per cubic metre. The new hole concentration in silicon is (in per m3\text{m}^{3})

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Answer: (b)

  1. Phosphorus is a donor, so ne≈1021 m−3n_e \approx 10^{21}\ \text{m}^{-3}.
  2. nh=ni2ne=10321021=1011 m−3n_h = \dfrac{n_i^2}{n_e} = \dfrac{10^{32}}{10^{21}} = 10^{11}\ \text{m}^{-3}
  3. So the answer is (b) 101110^{11}.
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Q38MHT CET 2025 · 25 APR · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

A piece of semiconductor is connected in series in an electric circuit. On increasing the temperature, the current in the circuit will

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Answer: (c)

  1. Raising TT breaks more covalent bonds, creating more electron-hole pairs.
  2. More carriers lowers the resistance of the semiconductor, so I=V/RI = V/R rises.
  3. So the answer is (c) increase.
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Q39MHT CET 2025 · 23 APR · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

By increasing the temperature, the specific resistance of a conductor and a semiconductor respectively

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Answer: (c)

  1. Conductor: carrier number is fixed, but more lattice vibrations increase collisions, so ρ\rho increases.
  2. Semiconductor: carrier number rises sharply with TT, so ρ\rho decreases.
  3. So the answer is (c) increases, decreases.
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Q40MHT CET 2025 · 21 APR · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

Which graph shows correctly the temperature (T). dependence of resistivity (ρ)(\rho) of a semiconductor?

Figure

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Answer: (a)

  1. For a semiconductor, carrier density rises roughly exponentially with TT, so ρ\rho falls steeply and then levels off.
  2. Graph C shows this falling, curved (decaying) shape; A and B rise (metal-like) and D is a straight line.
  3. So the answer is (a) C.
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Q41JEE Main 2025 · 4 APR · SHIFT 2Medium

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

Consider a n-type semiconductor in which nen_e and nhn_h are number of electrons and holes, respectively.

(A) Holes are minority carriers

(B) The dopant is a pentavalent atom

(C) nenh≠ni2n_e n_h \neq n_i^2

(where nin_i is number of electrons or holes in semiconductor when it is intrinsic form) (D) nenh⩾ni2n_e n_h \geqslant n_i^2

(E) The holes are not generated due to the donors

Choose the correct answer from the options given below:

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Answer: (a)

  1. (A) In n-type, holes are minority carriers: true. (B) The dopant is pentavalent: true.
  2. (C) Mass action law gives nenh=ni2n_e n_h = n_i^2, so nenh≠ni2n_e n_h \neq n_i^2 is false; (D) is therefore not the intended relation either.
  3. (E) Donors release only electrons; holes come from thermal pair generation: true.
  4. So the answer is (a) (A), (B), (E) only.
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Q42MHT CET 2024 · 16 MAY · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

When a small amount of impurity atoms are added to semiconductor, then generally its resistivity

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Answer: (c)

  1. Doping greatly increases the number of charge carriers.
  2. So conductivity rises and resistivity decreases.
  3. So the answer is (c) decreases.
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Q43MHT CET 2024 · 15 MAY · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

In an extrinsic n-type semiconductor, the free electrons donated by the impurity atoms occupy energy levels in

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Answer: (c)

  1. Donor electrons of a pentavalent impurity occupy the donor level.
  2. The donor level lies in the band gap, close to the conduction band (about 0.010.01 to 0.05 eV0.05\text{ eV} below it).
  3. So the answer is (c).
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Q44MHT CET 2024 · 3 MAY · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

Which one of the following statements is true? A p-type semiconductor is doped with

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Answer: (d)

  1. p-type: trivalent dopant (B, Al, Ga, In) creates a hole for each atom.
  2. So holes are majority carriers and electrons minority carriers.
  3. So the answer is (d).
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Q45MHT CET 2024 · 11 MAY · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · Mass action law

If ' nen_e ' and ' nhn_h ' are the number of electrons and number of holes respectively in a semiconductor heavily doped with phosphorus then

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Answer: (a)

  1. Phosphorus is pentavalent, so heavy doping gives a strongly n-type material.
  2. Since nenh=ni2n_e n_h = n_i^2, a very large nen_e makes nhn_h very small.
  3. So the answer is (a) ne≫nhn_e \gg n_h.
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Q46JEE Main 2024 · 6 APR · SHIFT 2Medium

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

The acceptor level of a p-type semiconductor is 6 eV6\text{ eV}. The maximum wavelength of light which can create a hole would be: Given hc=1242 eV nmhc = 1242\text{ eV nm}.

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Answer: (d)

  1. To create a hole, a photon must lift a valence electron to the acceptor level: E=hcλ≥6E = \dfrac{hc}{\lambda} \ge 6 eV.
  2. λmax=hcE=12426\lambda_{max} = \dfrac{hc}{E} = \dfrac{1242}{6} nm
  3. λmax=207\lambda_{max} = 207 nm
  4. So the answer is (d) 207 nm.
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Q47JEE Main 2024 · 1 FEB · SHIFT 2Difficult

Intrinsic & Extrinsic Semiconductors · Effect of temperature

To measure the temperature coefficient of resistivity α\alpha of a semiconductor, an electrical arrangement shown in the figure is prepared. The arm BC is made up of the semiconductor. The experiment is being conducted at 25∘C25^\circ\text{C} and resistance of the semiconductor arm is 3 mΩ3\text{ m}\Omega. Arm BC\text{BC} is cooled at a constant rate of 2∘C/s2^\circ\text{C/s}. If the galvanometer G\text{G} shows no deflection after 10 s10\text{ s}, then α\alpha is:

Figure

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Answer: (a)

  1. At balance (no deflection): RABRBC=RADRDC⇒0.8RBC=13\dfrac{R_{AB}}{R_{BC}} = \dfrac{R_{AD}}{R_{DC}} \Rightarrow \dfrac{0.8}{R_{BC}} = \dfrac{1}{3}, so RBC=2.4 mΩR_{BC} = 2.4\ \text{m}\Omega.
  2. Temperature change in 10 s: ΔT=−2×10=−20 ∘C\Delta T = -2 \times 10 = -20\ ^\circ\text{C}.
  3. R=R0(1+α ΔT)⇒2.4=3(1−20α)⇒∣α∣=0.63×20=1×10−2 ∘C−1R = R_0(1 + \alpha\,\Delta T) \Rightarrow 2.4 = 3(1 - 20\alpha) \Rightarrow |\alpha| = \dfrac{0.6}{3 \times 20} = 1 \times 10^{-2}\ ^\circ\text{C}^{-1}
  4. A semiconductor has a negative temperature coefficient.
  5. So the answer is (a) −1×10−2 ∘C−1-1 \times 10^{-2}\ ^\circ\text{C}^{-1}.
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Q48MHT CET 2023 · 14 MAY · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Intrinsic semiconductors

When the conductivity of a semiconductor is only due to the breaking of the covalent bonds, the semiconductor is called

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Answer: (b)

  1. Carriers produced only by breaking covalent bonds means a pure semiconductor with no dopant.
  2. This is an intrinsic semiconductor.
  3. So the answer is (b) intrinsic.
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Q49MHT CET 2023 · 9 MAY · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · Intrinsic semiconductors

For an intrinsic semiconductor (nh(n_h and nen_e are the number of holes per unit volume and number of electrons per unit volume respectively)

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Answer: (b)

  1. In an intrinsic semiconductor electrons and holes are created in pairs.
  2. So nh=nen_h = n_e.
  3. So the answer is (b).
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Q50MHT CET 2023 · 13 MAY · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

Doping of a semiconductor (with small impurity atoms) generally changes the resistivity as follows.

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Answer: (a)

  1. Doping adds many extra charge carriers to the semiconductor.
  2. More carriers mean higher conductivity, so resistivity decreases.
  3. So the answer is (a) Decreases.
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Q51NEET 2023Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

A p-type extrinsic semiconductor is obtained when Germanium is doped with:

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Answer: (d)

  1. A p-type semiconductor needs a trivalent (acceptor) impurity.
  2. Sb, P and As are pentavalent; boron is trivalent.
  3. So the answer is (d) Boron.
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Q52JEE Main 2023 · 6 APR · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

The resistivity (ρ)(\rho) of semiconductor varies with temperature. Which of the following curve represents the correct behaviour:

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Answer: (d)

  1. Semiconductor resistivity falls with temperature because the number of carriers rises roughly as e−Eg/2kTe^{-E_g/2kT}.
  2. So ρ\rho is very large at low TT and decreases along a decaying curve that flattens out.
  3. Graphs (a) and (c) rise with TT, (b) is a straight line; only (d) shows the decaying curve.
  4. So the answer is (d).
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Q53JEE Main 2023 · 31 JAN · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

The effect of increase in temperature on the number of electrons in conduction band (nen_e) and resistance of a semiconductor will be as:

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Answer: (c)

  1. Higher TT gives more electrons enough energy to jump across the band gap, so nen_e in the conduction band increases.
  2. More carriers means lower resistance.
  3. So the answer is (c) nen_e increases, resistance decreases.
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Q54JEE Main 2023 · 1 FEB · SHIFT 1Medium

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

Match List I with List II:

Choose the correct answer from the options given below:

List IList II
A.Intrinsic semiconductorI.Fermi-level near the valence band
B.n-type semiconductorII.Fermi-level in the middle of valence and conduction band.
C.p-type semiconductorIII.Fermi-level near the conduction band
D.MetalsIV.Fermi-level inside the conduction band
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Answer: (d)

  1. Intrinsic: equal nen_e and nhn_h, so EFE_F is midway between the bands: A-II.
  2. n-type: excess electrons push EFE_F near the conduction band: B-III.
  3. p-type: excess holes pull EFE_F near the valence band: C-I. Metals: EFE_F lies inside the conduction band: D-IV.
  4. So the answer is (d) A-II, B-III, C-I, D-IV.
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Q55MHT CET 2023 · 10 MAY · SHIFT 2Medium

Intrinsic & Extrinsic Semiconductors · Mass action law

A pure Si\text{Si} crystal has 4×10284 \times 10^{28} atoms per m3\text{m}^{3}. It is doped by 1 ppm concentration of antimony. The number of free electrons available will be

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Answer: (c)

  1. Each Sb (pentavalent) atom donates one free electron, so ne≈NDn_e \approx N_D.
  2. 1 ppm means 1 dopant atom per 10610^{6} Si atoms: ND=4×1028106=4×1022 m−3N_D = \dfrac{4 \times 10^{28}}{10^{6}} = 4 \times 10^{22}\ \text{m}^{-3}
  3. So the answer is (c) 4×1022 m−34 \times 10^{22}\ \text{m}^{-3}.
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Q56NEET 2022 · PHASE 1Easy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

As the temperature increases, the electrical resistance

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Answer: (c)

  1. Conductors: more lattice vibration at higher TT increases collisions, so RR increases.
  2. Semiconductors: more carriers are generated at higher TT, so RR decreases.
  3. So the answer is (c).
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Q57JEE Main 2021 · 26 AUG · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

Statement I: By doping silicon semiconductor with pentavalent material, the electrons density increases.

Statement II: The n-type semiconductor has net negative charge.

In the light of the above statements, choose the most appropriate answer from the options given below:

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Answer: (a)

  1. Statement I: pentavalent donors add free electrons, so electron density increases: true.
  2. Statement II: each donor that gives an electron becomes a fixed positive ion, so the crystal stays electrically neutral: false.
  3. So the answer is (a).
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Q58MHT CET 2021 · 21 SEP · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · Mass action law

In a pure silicon, number of electrons and holes per unit volume are 1.6×1016 m−31.6 \times 10^{16}\text{ m}^{-3}. If silicon is doped with Boron in a way that on doping hole density increases to 4×1022 m−34 \times 10^{22}\text{ m}^{-3}. Then electron density in doped semiconductor will be

Show answer and solution

Answer: (b)

  1. Mass action law: ne=ni2nhn_e = \dfrac{n_i^2}{n_h}
  2. ne=(1.6×1016)24×1022=2.56×10324×1022n_e = \dfrac{(1.6\times10^{16})^2}{4\times10^{22}} = \dfrac{2.56\times10^{32}}{4\times10^{22}}
  3. ne=6.4×109 m−3n_e = 6.4\times10^{9}\ \text{m}^{-3}
  4. So the answer is (b).
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Q59JEE Main 2021 · 25 JUL · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Mass action law

In a semiconductor, the number density of intrinsic charge carries at 27∘^\circC is 1.5 ×\times 1016/m3. If the semiconductor is doped with impurity atom, the hole density increases to 4.5 ×\times 1022/m3. The electron density in the doped semiconductor is ___________ ×\times 109/m3.

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 5

  1. Mass action law: nenh=ni2n_e n_h = n_i^2
  2. ne=(1.5×1016)24.5×1022=2.25×10324.5×1022n_e = \dfrac{(1.5\times10^{16})^2}{4.5\times10^{22}} = \dfrac{2.25\times10^{32}}{4.5\times10^{22}}
  3. ne=5×109 /m3n_e = 5\times10^{9}\ /\text{m}^3
  4. So the answer is 5.
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Q60MHT CET 2021 · 23 SEP · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

When the temperature of a semiconductor is increased, its resistance and electric conductivity respectively.

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Answer: (d)

  1. Higher TT creates more electron-hole pairs in a semiconductor.
  2. So resistance decreases and conductivity σ=e(neμe+nhμh)\sigma = e(n_e\mu_e + n_h\mu_h) increases.
  3. So the answer is (d) decreases and increases.
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Q61JEE Main 2021 · 25 FEB · SHIFT 2Medium

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

For extrinsic semiconductors; when doping level is increased;

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Answer: (d)

  1. More donor doping in n-type adds electrons, so EFE_F moves up towards the conduction band.
  2. More acceptor doping in p-type adds holes, so EFE_F moves down towards the valence band.
  3. So the answer is (d).
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Q62NEET 2021Medium

Intrinsic & Extrinsic Semiconductors · Conductivity & mobility

The electron concentration in an n-type semiconductor is the same as hole concentration in a p-type semiconductor. An external field (electric) is applied across each of them. Compare the currents in them.

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Answer: (d)

  1. Current I=neAvd=neAμEI = neAv_d = neA\mu E, so for equal carrier concentration and equal field, I∝μI \propto \mu.
  2. Electrons are more mobile than holes: μe>μh\mu_e > \mu_h.
  3. So the answer is (d) current in n-type > current in p-type.
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Q63MHT CET 2021 · 20 SEP · SHIFT 1Medium

Intrinsic & Extrinsic Semiconductors · Effect of temperature

Silicon and copper are cooled from 300 K to 100 K, the specific resistance (resistivity)

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Answer: (c)

  1. Copper (metal): on cooling, lattice vibrations reduce, collisions fall, so resistivity decreases.
  2. Silicon (semiconductor): on cooling, fewer electrons cross the band gap, carrier number falls, so resistivity increases.
  3. So the answer is (c) decreases in copper and increases in silicon.
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Q64MHT CET 2020 · 19 OCT · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Intrinsic semiconductors

In an intrinsic semiconductor, at an ordinary temperature, the correct relation between the number of electrons per unit volume nen_e and number of holes per unit volume nhn_h.

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Answer: (a)

  1. Thermal breaking of each covalent bond creates one electron and one hole.
  2. So ne=nhn_e = n_h, both non-zero at ordinary temperature.
  3. So the answer is (a) ne=nhn_e = n_h.
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Q65MHT CET 2020 · 16 OCT · SHIFT 1Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

When a small amount of impurity atoms are added to a semiconductor, then generally its resistivity

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Answer: (c)

  1. Doping adds extra charge carriers (electrons from donors or holes from acceptors).
  2. More carriers means higher conductivity σ=e(neμe+nhμh)\sigma = e(n_e\mu_e + n_h\mu_h), so resistivity ρ=1/σ\rho = 1/\sigma falls.
  3. So the answer is (c) decreases.
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Q66NEET 2020 · PHASE 2Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

An intrinsic semiconductor is converted into nn-type extrinsic semiconductor by doping it with

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Answer: (b)

  1. An n-type semiconductor needs a pentavalent (donor) impurity.
  2. Phosphorus has 5 valence electrons; Al is trivalent, Ge is tetravalent, Ag is a metal.
  3. So the answer is (b) Phosphorous.
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Q67MHT CET 2020 · 16 OCT · SHIFT 2Easy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

At absolute zero temperature, pure silicon behaves as

Show answer and solution

Answer: (b)

  1. At 00 K no electron has enough energy to cross the band gap (≈1.1\approx 1.1 eV for Si).
  2. The conduction band is empty and the valence band full, so there are no free carriers.
  3. So the answer is (b) insulator.
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Q68NEET 2019Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

For a p-type semiconductor, which of the following statements is true?

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Answer: (a)

  1. p-type is made by adding trivalent (acceptor) atoms such as B, Al, In.
  2. Each acceptor creates a hole, so holes are the majority carriers.
  3. So the answer is (a).
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Q69JEE Main 2019 · 9 JAN · SHIFT 1Medium

Intrinsic & Extrinsic Semiconductors · Conductivity & mobility

Mobility of electrons in a semiconductor is defined as the ratio of their drift velocity to the applied electric field. If, for an n-type semiconductor, the density of electrons is 1019 m−3{}^{-3} and their mobility is 1.6 m2/(V.s) then the resistivity of the semiconductor (since it is an n-type semiconductor contribution of holes is ignored) is close to:

Show answer and solution

Answer: (c)

  1. For an n-type semiconductor, σ=neμe\sigma = n e \mu_e and ρ=1neμe\rho = \dfrac{1}{n e \mu_e}.
  2. ρ=11019×1.6×10−19×1.6=12.56\rho = \dfrac{1}{10^{19} \times 1.6 \times 10^{-19} \times 1.6} = \dfrac{1}{2.56}
  3. ρ≈0.39 Ω m\rho \approx 0.39\ \Omega\,\text{m}
  4. So the answer is (c) 0.4 Ω m0.4\ \Omega\,\text{m}.
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Q70JEE Main 2017 · 8 APR · SHIFT 1Medium

Intrinsic & Extrinsic Semiconductors · Conductivity & mobility

What is the conductivity of a semiconductor sample having electron concentration of 5×1018 m−3,5 \times 10^{18}\text{ m}^{-3}, hole concentration of 5×1019 m−3,5 \times 10^{19}\text{ m}^{-3}, electron mobility of 2.0 m2 V−1{}^{-1} s-1 and hole mobility of 0.01 m2 V−1{}^{-1} s−1{}^{-1}?

(Take charge of electron as 1.6 ×\times 10 −-19 C)

Show answer and solution

Answer: (a)

  1. σ=e(neμe+nhμh)\sigma = e(n_e \mu_e + n_h \mu_h)
  2. neμe=5×1018×2.0=1.0×1019n_e \mu_e = 5 \times 10^{18} \times 2.0 = 1.0 \times 10^{19}, nhμh=5×1019×0.01=0.05×1019n_h \mu_h = 5 \times 10^{19} \times 0.01 = 0.05 \times 10^{19}
  3. σ=1.6×10−19×1.05×1019=1.68 (Ω-m)−1\sigma = 1.6 \times 10^{-19} \times 1.05 \times 10^{19} = 1.68\ (\Omega\text{-m})^{-1}
  4. So the answer is (a) 1.68 (Ω-m)−11.68\ (\Omega\text{-m})^{-1}.
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Q71JEE Main 2016Difficult

Intrinsic & Extrinsic Semiconductors · Effect of temperature

The temperature dependence of resistance of Cu\text{Cu} and undoped Si\text{Si} in the temperature range 300−400 K,300 - 400\text{ K}, is best described by:

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Answer: (a)

  1. Cu (metal): R=R0(1+αΔT)R = R_0(1 + \alpha \Delta T), a linear increase with temperature.
  2. Undoped Si: carrier density ∝e−Eg/2kT\propto e^{-E_g/2kT}, so resistance decreases exponentially with temperature.
  3. So the answer is (a) linear increase for Cu, exponential decrease for Si.
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Q72NEET 2013Easy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

In a n-type semiconductor, which of the following statements is true?

Show answer and solution

Answer: (a)

  1. n-type is made by adding pentavalent (donor) atoms such as P, As, Sb.
  2. Donors give free electrons, so electrons are majority and holes are minority carriers.
  3. So the answer is (a).
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Q73NEET 2011 · AIPMT · PRELIMSEasy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

If a small amount of antimony is added to germanium crystal

Show answer and solution

Answer: (c)

  1. Antimony is pentavalent, so it acts as a donor in Ge.
  2. Ge becomes n-type: free electrons outnumber holes, and resistance decreases.
  3. So the answer is (c).
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Q74NEET 2011 · AIPMT · MAINSEasy

Intrinsic & Extrinsic Semiconductors · Mass action law

Pure Si at 500 K has equal number of electron (ne) and hole (nh) concentrations of 1.5 ×\times 1016 m−3{}^{-3}. Doping by indium increases nh to 4.5 ×\times 1022 m−3{}^{-3}. The doped semiconductor is of

Show answer and solution

Answer: (a)

  1. Indium is trivalent, so the doped Si is p-type.
  2. ne=ni2nh=(1.5×1016)24.5×1022=2.25×10324.5×1022n_e = \dfrac{n_i^2}{n_h} = \dfrac{(1.5\times10^{16})^2}{4.5\times10^{22}} = \dfrac{2.25\times10^{32}}{4.5\times10^{22}}
  3. ne=5×109 m−3n_e = 5\times10^{9}\ \text{m}^{-3}
  4. So the answer is (a) p-type with ne=5×109 m−3n_e = 5\times10^9\ \text{m}^{-3}.
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Q75NEET 2010 · AIPMT · PRELIMSEasy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

Which one of the following statement is false?

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Answer: (b)

  1. (a) Trivalent doping gives p-type: true.
  2. (b) In n-type the majority carriers are electrons, not holes: false.
  3. (c) Minority carriers in p-type are electrons: true. (d) Intrinsic resistance falls as TT rises: true.
  4. So the false statement is (b).
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Q76NEET 2007 · AIPMTMedium

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

In the energy band diagram of a material shown below, the open circles and filled circles denote holes and electrons respectively. The material is

Figure

Show answer and solution

Answer: (d)

  1. The diagram shows a band gap EgE_g between ECE_C and EVE_V, so it is a semiconductor (not a metal).
  2. Holes (open circles) in the valence band outnumber electrons (filled circles) in the conduction band.
  3. Holes are the majority carriers, so the material is p-type.
  4. So the answer is (d) a p-type semiconductor.
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Q77JEE Main 2006 · AIEEEMedium

Intrinsic & Extrinsic Semiconductors · Conductivity & mobility

If the ratio of the concentration of electrons to that of holes in a semiconductor is 75\frac{7}{5} and the ratio of currents is 74,\frac{7}{4}, then what is the ratio of their drift velocities?

Show answer and solution

Answer: (c)

  1. I=neAvd⇒vd∝InI = neAv_d \Rightarrow v_d \propto \dfrac{I}{n} for the same sample.
  2. vevh=IeIh×nhne=74×57=54\dfrac{v_e}{v_h} = \dfrac{I_e}{I_h} \times \dfrac{n_h}{n_e} = \dfrac{7}{4} \times \dfrac{5}{7} = \dfrac{5}{4}
  3. So the answer is (c) 54\dfrac{5}{4}.
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Q78JEE Main 2004 · AIEEEEasy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

A piece of copper and another of germanium are cooled from room temperature to 77 K,77\text{ K}, the resistance of

Show answer and solution

Answer: (d)

  1. Copper (metal): fewer lattice vibrations on cooling, so resistance decreases.
  2. Germanium (semiconductor): fewer free carriers on cooling, so resistance increases.
  3. So the answer is (d).
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Q79JEE Main 2003 · AIEEEEasy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

A strip of copper and another of germanium are cooled from room temperature to 80 K.80\text{ K}. The resistance of

Show answer and solution

Answer: (c)

  1. Copper (metal): cooling reduces collisions with the vibrating lattice, so resistance decreases.
  2. Germanium (semiconductor): cooling reduces carrier generation, so resistance increases.
  3. So the answer is (c).
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Q80JEE Main 2003 · AIEEEMedium

Intrinsic & Extrinsic Semiconductors · Effect of temperature

The difference in the variation of resistance with temperature in a metal and a semiconductor arises essentially due to the difference in the

Show answer and solution

Answer: (b)

  1. In a metal the number of free electrons is fixed; rising temperature only increases scattering, so RR rises.
  2. In a semiconductor the number of carriers rises sharply with temperature, so RR falls.
  3. So the answer is (b) variation of the number of charge carriers with temperature.
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Q81JEE Main 2002 · AIEEEEasy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

At absolute zero, Si acts as

Show answer and solution

Answer: (c)

  1. At absolute zero no electron in Si can cross the band gap.
  2. Conduction band empty, valence band full: no free charge carriers.
  3. So the answer is (c) insulator.
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Q82JEE Main 2002 · AIEEEEasy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

By increasing the temperature, the specific resistance of a conductor and a semiconductor

Show answer and solution

Answer: (c)

  1. Conductor: more lattice vibration at higher TT, so specific resistance increases.
  2. Semiconductor: more electron-hole pairs at higher TT, so specific resistance decreases.
  3. So the answer is (c) increases, decreases.
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Q83NEET 1999 · AIPMTEasy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

Which of the following when added as an impurity into silicon produces nn-type semiconductor?

Show answer and solution

Answer: (a)

  1. n-type silicon needs a pentavalent donor.
  2. P (group 15) is pentavalent; Al and B are trivalent, Mg is divalent.
  3. So the answer is (a) P.
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Q84NEET 1999 · AIPMTEasy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

In a junction diode, the holes are due to

Show answer and solution

Answer: (d)

  1. A hole is a vacancy left in a covalent bond when an electron is absent.
  2. It behaves like a positive charge +e+e.
  3. So the answer is (d) missing electrons.
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Q85NEET 1999 · AIPMTEasy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

In pp-type semiconductor, the major charge carriers are

Show answer and solution

Answer: (a)

  1. p-type is doped with trivalent acceptors, each creating a hole.
  2. So holes far outnumber free electrons.
  3. So the answer is (a) holes.
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Q86NEET 1997 · AIPMTEasy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

To obtain a p-type germanium semiconductor, it must be doped with

Show answer and solution

Answer: (a)

  1. p-type Ge needs a trivalent acceptor.
  2. Indium is trivalent; P, As and Sb are pentavalent.
  3. So the answer is (a) indium.
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Q87NEET 1996 · AIPMTEasy

Intrinsic & Extrinsic Semiconductors · n-type & p-type doping

When arsenic is added as an impurity to silicon, the resulting material is

Show answer and solution

Answer: (b)

  1. Arsenic is pentavalent, so it donates a free electron in Si.
  2. Electrons become majority carriers, but the material is still a semiconductor.
  3. So the answer is (b) n-type semiconductor.
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Q88NEET 1992 · AIPMTEasy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

A piece of copper and other of germanium are cooled from the room temperature to 80 K80\text{ K}, then

Show answer and solution

Answer: (d)

  1. Copper is a metal: cooling reduces lattice vibrations, so its resistance decreases.
  2. Germanium is a semiconductor: cooling reduces the number of free carriers, so its resistance increases.
  3. So the answer is (d).
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Q89NEET 1989 · AIPMTMedium

Intrinsic & Extrinsic Semiconductors · Effect of temperature

When n type semiconductor is heated

Show answer and solution

Answer: (d)

  1. Heating breaks covalent bonds and creates electron-hole pairs.
  2. Each broken bond adds one free electron and one hole, so both increase by the same number.
  3. So the answer is (d) number of electrons and holes increases equally.
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Q90NEET 1988 · AIPMTEasy

Intrinsic & Extrinsic Semiconductors · Effect of temperature

At absolute zero, Si acts as

Show answer and solution

Answer: (c)

  1. At 00 K the valence band of Si is full and the conduction band is empty.
  2. No free carriers exist, so Si cannot conduct.
  3. So the answer is (c) insulator.
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Q91MHT CET 2026 · 14 MAY · SHIFT 1Easy

P-N Junction Diode · Depletion layer & barrier

In the middle of the depletion region of reversed biased p-n junction the

Show answer and solution

Answer: (c)

  1. The depletion region has fixed positive ions on the n-side and negative ions on the p-side.
  2. The field points from n to p and is strongest at the junction (middle of the depletion region); reverse bias makes it even larger.
  3. So the answer is (c) electric field is maximum.
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Q92MHT CET 2026 · 20 APR · SHIFT 2Easy

P-N Junction Diode · Depletion layer & barrier

The depletion region of p-n junction

Show answer and solution

Answer: (a)

  1. Reverse bias pulls majority carriers away from the junction, exposing more fixed ions.
  2. Forward bias pushes carriers toward the junction and narrows it.
  3. So the answer is (a) increases if reverse biased.
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Q93MHT CET 2026 · 13 MAY · SHIFT 2Easy

P-N Junction Diode · Forward & reverse bias

The forward biased diode connection is

Show answer and solution

Answer: (a)

  1. Forward bias: the p-side (arrow end, anode) is at a higher potential than the n-side (bar end, cathode).
  2. (a) anode +2 V+2\ \text{V}, cathode side −2 V-2\ \text{V}: forward. (b) 2 V<4 V2\ \text{V} < 4\ \text{V}: reverse.
  3. (c) −3 V=−3 V-3\ \text{V} = -3\ \text{V}: no bias. (d) −2 V<+2 V-2\ \text{V} < +2\ \text{V}: reverse.
  4. So the answer is (a).
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Q94MHT CET 2026 · 18 APR · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

A diode and resistance are connected as shown in figures.

Figure

Out of the following statements, which one is true?

Diode in

A) fig (1) and fig (2) are both forward biased.

B) fig (1) and fig (2) are both reverse biased.

C) fig (1) is forward biased and in fig (2) is reverse biased.

D) fig (1) is reverse biased and in fig (2) is forward biased.

Show answer and solution

Answer: (a)

  1. Forward bias needs anode potential > cathode-side potential.
  2. Fig. 1: anode −5 V-5\ \text{V}, other end −3 V-3\ \text{V}; −5<−3-5 < -3, so reverse biased.
  3. Fig. 2: anode 0 V0\ \text{V}, other end −4 V-4\ \text{V}; 0>−40 > -4, so forward biased.
  4. Statement D is true, so the answer is (a) D.
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Q95MHT CET 2026 · 15 APR · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

For a p-n junction diode, breakdown voltage occurs when

Show answer and solution

Answer: (c)

  1. In reverse bias only a tiny saturation current flows.
  2. When the reverse voltage is increased to the breakdown value, the current rises sharply (Zener or avalanche breakdown).
  3. So the answer is (c) reverse bias is increased.
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Q96MHT CET 2026 · 15 APR · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

If p-n junction diode is forward biased then

Show answer and solution

Answer: (a)

  1. Forward bias opposes the barrier field and pushes majority carriers toward the junction.
  2. So the barrier voltage falls, the depletion layer narrows and current flows.
  3. So the answer is (a) width of depletion layer decreases.
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Q97NEET 2026Easy

P-N Junction Diode · Forward & reverse bias

Two statements are given below:

A. When the forward bias voltage across a p-n junction diode increases above a certain threshold voltage, the diode current increases significantly.

B. This current is called reverse saturation current.

Choose the correct answer from the options given below:

Show answer and solution

Answer: (b)

  1. A: above the threshold (knee) voltage the forward current rises sharply. True.
  2. B: this is forward current carried by majority carriers; reverse saturation current is the tiny current in reverse bias. False.
  3. So the answer is (b) Statement A is true, but Statement B is false.
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Q98JEE Main 2026 · 5 APR · SHIFT 2Medium

P-N Junction Diode · Depletion layer & barrier

In a semiconductor pp-n diode, the doping concentrations on pp-side and nn-side are 101510^{15} atoms /cm3/\text{cm}^{3} and 101810^{18} atoms /cm3/\text{cm}^{3}, respectively. Which one of the following statements is true?

Show answer and solution

Answer: (b)

  1. Charge neutrality of the depletion layer: NAxp=NDxnN_A x_p = N_D x_n.
  2. xpxn=NDNA=10181015=103\dfrac{x_p}{x_n} = \dfrac{N_D}{N_A} = \dfrac{10^{18}}{10^{15}} = 10^{3}
  3. The lightly doped p side has the wider depletion region.
  4. So the answer is (b).
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Q99MHT CET 2026 · 17 APR · SHIFT 2Medium

P-N Junction Diode · Forward & reverse bias

A semiconductor X is made by doping a germanium crystal with indium (Z=49)(Z = 49). A second semiconductor Y is made by doping germanium crystal with arsenic (Z=33)(Z = 33). Both are joined end to end and connected to a battery as shown. Which of the following statements is correct?

Figure

Show answer and solution

Answer: (a)

  1. Indium (group 13, trivalent) makes Ge p-type, so X is p-type; Arsenic (group 15, pentavalent) makes Ge n-type, so Y is n-type.
  2. In the figure the longer (positive) plate of the battery is on the left, connected to X.
  3. Positive terminal to p side means forward bias.
  4. So the answer is (a).
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Q100NEET 2026 · RE-NEETMedium

P-N Junction Diode · Forward & reverse bias

Three identical p-n junction diodes D1,D2D_1, D_2, and D3D_3 are connected across a battery as shown in the figure. If the width of the depletion regions of D1,D2D_1, D_2 and D3D_3 are W1,W2W_1, W_2 and W3W_3, respectively, then the correct option is:

Figure

Show answer and solution

Answer: (d)

  1. Battery positive terminal (long plate) is on the left node, negative on the right node.
  2. D1D_1 points from left to right: anode at higher potential, forward biased, so depletion width narrowest.
  3. D3D_3 points from right to left: reverse biased, so depletion width widest.
  4. D2D_2 branch is open (break in the wire), so D2D_2 is unbiased with its natural width.
  5. So W3>W2>W1W_3 > W_2 > W_1: the answer is (d).
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Q101JEE Main 2026 · 4 APR · SHIFT 2Medium

P-N Junction Diode · Forward & reverse bias

Given below are two statements: one is labelled as Assertion A and the other is labelled as Reason R\mathbf{R}

Assertion A: A diode under reverse-biased condition provides very small current which is nearly independent of voltage until a critical limit at which the current increases drastically. Reason R: Below the critical voltage limit, only majority charge carriers flow which increases drastically above critical voltage.

choose the correct answer from the options given below

Show answer and solution

Answer: (c)

  1. Assertion: reverse current is small and almost constant up to the breakdown voltage, then rises sharply. True.
  2. Reason: below breakdown the reverse current is due to minority carriers, not majority carriers. False.
  3. So the answer is (c) A is true but R is false.
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Q102MHT CET 2026 · 12 MAY · SHIFT 2Medium

P-N Junction Diode · Diode circuits

The circuit shown contains two ideal diodes D1D_1 and D2D_2. If a cell of e.m.f. 33V and negligible internal resistance is connected, then the current through 70 Ω70\ \Omega resistance in ampere is

Figure

Show answer and solution

Answer: (c)

  1. The left plate of the cell is positive, so current reaches the left junction and moves right through the diode branches.
  2. D1D_1 points left (reverse biased): no current. D2D_2 points right (forward biased): conducts.
  3. Circuit: 30 Ω30\ \Omega (with D2D_2) in series with 70 Ω70\ \Omega.
  4. I=330+70=0.03I = \dfrac{3}{30 + 70} = 0.03 A
  5. So the answer is (c) 0.030.03 A.
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Q103MHT CET 2026 · 12 MAY · SHIFT 1Medium

P-N Junction Diode · Diode circuits

In one branch, 40 Ω40\ \Omega resistance and a p-n junction diode are connected in series and in another branch, 40 Ω40\ \Omega resistance is connected. Both the branches are connected in parallel to each other. The total resistance of the circuit when a) diode is forward biased and when b) diode is reverse biased respectively are {consider the p-n junction diode as an ideal diode}

Show answer and solution

Answer: (c)

  1. Forward biased ideal diode acts as a short: both 40 Ω40\ \Omega branches in parallel, R=40×4080=20 ΩR = \dfrac{40\times 40}{80} = 20\ \Omega.
  2. Reverse biased ideal diode acts as an open switch: only one 40 Ω40\ \Omega branch, R=40 ΩR = 40\ \Omega.
  3. So the answer is (c) 20 Ω20\ \Omega and 40 Ω40\ \Omega.
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Q104MHT CET 2026 · 19 APR · SHIFT 2Medium

P-N Junction Diode · Diode circuits

In the following electrical circuit, the reading in the milliammeter is

(Take knee voltage of silicon diode =0.7= 0.7 V)

Figure

Show answer and solution

Answer: (b)

  1. The diode's p-side is at the battery's positive terminal, so it is forward biased with a 0.70.7 V drop.
  2. I=V−VkR=5−0.7200I = \dfrac{V - V_k}{R} = \dfrac{5 - 0.7}{200}
  3. I=4.3200=0.0215I = \dfrac{4.3}{200} = 0.0215 A =21.5= 21.5 mA
  4. So the answer is (b) 21.521.5 mA.
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Q105MHT CET 2026 · 17 APR · SHIFT 1Medium

P-N Junction Diode · Diode circuits

In the circuit shown in figure all the three diodes D1, D2, D3 have forward resistance 50 Ω50\ \Omega each and infinite backward resistance. If the battery voltage is 5V, the current through 100 Ω100\ \Omega resistance is

Figure

Show answer and solution

Answer: (b)

  1. The left terminal of the battery is positive. D1D_1 and D2D_2 point right (forward), D3D_3 points left (reverse, open).
  2. Branch resistances: D1D_1 branch =50+150=200 Ω= 50 + 150 = 200\ \Omega, D2D_2 branch =50+50=100 Ω= 50 + 50 = 100\ \Omega.
  3. Parallel: 200×100300=2003 Ω\dfrac{200\times 100}{300} = \dfrac{200}{3}\ \Omega; total =100+2003=5003 Ω= 100 + \dfrac{200}{3} = \dfrac{500}{3}\ \Omega
  4. I=5500/3=0.03I = \dfrac{5}{500/3} = 0.03 A =30= 30 mA through the 100 Ω100\ \Omega resistor.
  5. So the answer is (b) 3030 mA.
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Q106MHT CET 2026 · 15 APR · SHIFT 2Medium

P-N Junction Diode · Diode circuits

In the diagram shown, the resistance between points A and B is 'R1R_1' when an ideal diode D is forward biased and is 'R2R_2 ' when ideal diode D is reverse biased. The ratio R1/R2R_1/R_2 is

Figure

Show answer and solution

Answer: (c)

  1. Forward bias: diode is a short, so the two 30 Ω30\ \Omega resistors are in parallel, R1=15 ΩR_1 = 15\ \Omega.
  2. Reverse bias: diode branch is open, so only the lower 30 Ω30\ \Omega remains, R2=30 ΩR_2 = 30\ \Omega.
  3. R1R2=1530=12\dfrac{R_1}{R_2} = \dfrac{15}{30} = \dfrac{1}{2}
  4. So the answer is (c) 12\frac{1}{2}.
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Q107NEET 2026Medium

P-N Junction Diode · Diode circuits

The current / in the circuit shown below is: (All diodes are ideal and identical)

Figure

Show answer and solution

Answer: (d)

  1. The left terminal of the battery is positive, so current flows left to right through the branches.
  2. Diodes pointing right conduct: the 4 Ω4\ \Omega and 2 Ω2\ \Omega branches. Diodes pointing left block: the 3 Ω3\ \Omega and 5 Ω5\ \Omega branches.
  3. Req=4×24+2=43 ΩR_{eq} = \dfrac{4\times 2}{4 + 2} = \dfrac{4}{3}\ \Omega
  4. I=104/3=152I = \dfrac{10}{4/3} = \dfrac{15}{2} A
  5. So the answer is (d) 152\frac{15}{2} A.
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Q108JEE Main 2026 · 28 JAN · SHIFT 1Medium

P-N Junction Diode · Diode circuits

Assuming in forward bias condition there is a voltage drop of 0.7 V across a silicon diode, the current through diode D1D_1 in the circuit is ______ mA.

(Assume all diodes in the given circuit are identical)

Figure

Show answer and solution

Answer: (b)

  1. D1D_1 and D3D_3 point down (forward biased); D2D_2 points up (reverse biased, no current).
  2. The conducting diodes are in parallel, so the voltage across them is 0.70.7 V.
  3. Current through R1R_1: I=12−0.7300=11.3300=37.67I = \dfrac{12 - 0.7}{300} = \dfrac{11.3}{300} = 37.67 mA
  4. Identical diodes share it equally: ID1=37.672≈18.8I_{D_1} = \dfrac{37.67}{2} \approx 18.8 mA
  5. So the answer is (b) 18.818.8 mA.
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Q109NEET 2026Medium

P-N Junction Diode · Waveforms & RC circuits

In the circuit shown below, the voltage appearing across the diode D will be of the form:

Figure

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Answer: (d)

  1. The diode's cathode faces the source's upper terminal and its anode faces RR.
  2. Positive half cycle: the diode is reverse biased, no current flows, so the whole input appears across it: vD=viv_D = v_i.
  3. Negative half cycle: the diode is forward biased (ideal), so vD=0v_D = 0.
  4. vDv_D shows only the positive half cycles with gaps between them. So the answer is (d).
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Q110JEE Main 2026 · 21 JAN · SHIFT 2Medium

P-N Junction Diode · Waveforms & RC circuits

The charge stored by the capacitor C in the given circuit in the steady state is __________ µC.

Figure

Show answer and solution

Answer: (c)

  1. In steady state no current flows in the capacitor branch.
  2. The battery makes the left node positive, so the 4 Ω4\ \Omega branch diode is forward biased and the 3 Ω3\ \Omega branch diode is reverse biased.
  3. Loop current: I=2.51+4=0.5I = \frac{2.5}{1 + 4} = 0.5 A.
  4. Voltage between the two nodes =2.5−0.5×1=2= 2.5 - 0.5 \times 1 = 2 V, and this is the capacitor voltage (no drop across 2 Ω2\ \Omega).
  5. Q=CV=5 μF×2=10 μCQ = CV = 5\ \mu\text{F} \times 2 = 10\ \mu\text{C}. So the answer is (c).
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Q111JEE Main 2026 · 4 APR · SHIFT 1Difficult

P-N Junction Diode · Waveforms & RC circuits

Consider a circuit consisting of a capacitor (20 μF)(20\,\mu\text{F}), resistor (100 Ω)(100\,\Omega) and two identical diodes as shown in figure. The resistance of diode under forward biasing condition is 10 Ω10\,\Omega. The time constant of the circuit is α×10−3 s\alpha \times 10^{-3}\text{ s}. The value of α\alpha is ______

Figure

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Answer: (a)

  1. The two diodes are in parallel but opposite, so for either current direction exactly one is forward biased (10 Ω10\ \Omega) and the other is open.
  2. Total resistance in series with CC: R=100+10=110 ΩR = 100 + 10 = 110\ \Omega.
  3. τ=RC=110×20×10−6=2.2×10−3\tau = RC = 110 \times 20 \times 10^{-6} = 2.2 \times 10^{-3} s.
  4. So α=2.2\alpha = 2.2, answer (a).
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Q112JEE Main 2026 · 2 APR · SHIFT 1Difficult

P-N Junction Diode · Waveforms & RC circuits

For the given circuit (shown in part (A)) the time dependent input voltage vin(t)v_{in}(t) and corresponding output vo(t)v_{o}(t) are shown in part (B) and part (C), respectively. Identify the components that are used in the circuit between points X and Y.

Figure

Figure

Show answer and solution

Answer: (b)

  1. The given branch (ideal diode + Zener, cathodes joined) conducts only when the top line is positive: diode forward, Zener in breakdown, so it clips the output at +5+5 V.
  2. For the negative half it is blocked, so another branch between X and Y is needed to clip at −5-5 V.
  3. This branch must be the same pair reversed: ideal diode and Zener joined anode to anode, with no resistor (a series resistor would stop the flat clipping).
  4. Then in the negative half the Zener breaks down at 5 V and the ideal diode conducts, giving vo=−5v_o = -5 V. So the answer is (b).
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Q113MHT CET 2025 · 19 APR · SHIFT 1Easy

P-N Junction Diode · Depletion layer & barrier

In the depletion layer of reverse biased p-n junction, the

Show answer and solution

Answer: (c)

  1. The depletion layer contains only immobile ions, which set up a strong field from n to p.
  2. Reverse bias adds to this field, so the field in the depletion layer is maximum (largest at the junction).
  3. So the answer is (c) electric field is maximum.
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Q114MHT CET 2025 · 5 MAY · SHIFT 2Easy

P-N Junction Diode · Forward & reverse bias

Which of the following figure represents forward bias diode?

Figure

Show answer and solution

Answer: (a)

  1. Forward bias: anode (arrow side) potential > potential on the bar side.
  2. A: 0>−40 > -4 forward. B: −4<−3-4 < -3 reverse. C: −2<+2-2 < +2 reverse. D: 3<53 < 5 reverse.
  3. So the answer is (a) A.
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Q115MHT CET 2025 · 26 APR · SHIFT 2Easy

P-N Junction Diode · Forward & reverse bias

If p-n junction diode is forward biased, then

Show answer and solution

Answer: (b)

  1. Forward bias reduces the barrier and pushes carriers into the depletion region.
  2. So the depletion layer becomes narrower and conduction takes place.
  3. So the answer is (b) width of depletion layer decreases.
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Q116MHT CET 2025 · 26 APR · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

Applying forward bias to p-n junction, the potential barrier

Show answer and solution

Answer: (b)

  1. The applied forward voltage opposes the built-in barrier.
  2. Effective barrier becomes VB−VV_B - V, smaller than before.
  3. So the answer is (b) decreases.
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Q117MHT CET 2025 · 25 APR · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

In which of the following figures, the p.n. junction diode is reverse biased?

Figure
Figure
Figure
Figure
Show answer and solution

Answer: (c)

  1. Reverse bias: anode (arrow side) at a lower potential than the cathode (bar side).
  2. (a) anode +6 V+6\ \text{V}, cathode side −2 V-2\ \text{V}: forward. (d) anode +6 V+6\ \text{V} via R, cathode at 0 V: forward.
  3. (b) anode at −5 V-5\ \text{V} via R, cathode 3 V3\ \text{V}: reverse. (c) anode at 0 V (ground), cathode at 10 V10\ \text{V} via R: reverse.
  4. Figure (b) is reverse biased, so the answer is (c) b.
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Q118JEE Main 2025 · 22 JAN · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

Which of the following circuits represents a forward biased diode?

Figure

Choose the correct answer from the options given below:

Show answer and solution

Answer: (d)

  1. Forward bias: anode (triangle side) potential >> cathode (bar side) potential.
  2. (A) anode −10 V-10\text{ V}, cathode at a higher potential: reverse. (B) anode −10 V-10\text{ V}, cathode −15 V-15\text{ V}: forward.
  3. (C) anode 5 V5\text{ V}, cathode 2 V2\text{ V}: forward.
  4. (D) diode points left: cathode −5 V-5\text{ V}, anode −10 V-10\text{ V}: reverse. (E) cathode 0 V0\text{ V} (ground), anode 2 V2\text{ V}: forward.
  5. So the answer is (d) (B), (C) and (E) only.
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Q119MHT CET 2025 · 20 APR · SHIFT 1Easy

P-N Junction Diode · Diode circuits

For an ideal diode, in forward and reverse biased condition the resistance is respectively

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Answer: (d)

  1. An ideal diode acts as a closed switch in forward bias: Rf=0R_f = 0.
  2. It acts as an open switch in reverse bias: Rr=∞R_r = \infty.
  3. So the answer is (d) zero, infinite.
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Q120MHT CET 2025 · 19 APR · SHIFT 2Medium

P-N Junction Diode · Depletion layer & barrier

In unbiased p-n junction diode

Show answer and solution

Answer: (c)

  1. Electrons diffuse from n to p and holes from p to n, leaving ++ ions on the n side and −- ions on the p side.
  2. So the n side is at a higher potential, and the field at the junction points from ++ (n side) to −- (p side).
  3. So the answer is (c).
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Q121MHT CET 2025 · 21 APR · SHIFT 2Medium

P-N Junction Diode · Diode circuits

If the internal resistance of cell is negligible then current flowing through the circuit is

Figure

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Answer: (d)

  1. The battery's positive terminal sends current through 20 Ω20\ \Omega to the left junction.
  2. D1D_1 points right (forward biased), so the middle 30 Ω30\ \Omega branch conducts; D2D_2 points left (reverse biased), so the top branch carries no current.
  3. Total resistance =20+30=50 Ω= 20 + 30 = 50\ \Omega
  4. I=550=0.1I = \dfrac{5}{50} = 0.1 A
  5. So the answer is (d) 0.100.10 A.
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Q122MHT CET 2025 · 20 APR · SHIFT 2Medium

P-N Junction Diode · Diode circuits

In the following circuit shown in figure, three diodes are connected each with forward resistance 40 Ω40\ \Omega and infinite backward resistance. The current through 100 Ω100\ \Omega resistance is

Figure

Show answer and solution

Answer: (b)

  1. The top rail is at the battery's positive terminal. D1D_1 points up (reverse, open); D2D_2 and D3D_3 point down (forward).
  2. Branches: D2D_2: 40+60=100 Ω40 + 60 = 100\ \Omega; D3D_3: 40+160=200 Ω40 + 160 = 200\ \Omega. Parallel =100×200300=2003 Ω= \dfrac{100\times 200}{300} = \dfrac{200}{3}\ \Omega.
  3. Total =100+2003=5003 Ω= 100 + \dfrac{200}{3} = \dfrac{500}{3}\ \Omega
  4. I=6500/3=0.036I = \dfrac{6}{500/3} = 0.036 A =36= 36 mA
  5. So the answer is (b) 3636 mA.
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Q123JEE Main 2025 · 23 JAN · SHIFT 2Medium

P-N Junction Diode · Diode circuits

What is the current through the battery in the circuit shown below?

Figure

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Answer: (d)

  1. Both diodes point the same way and are forward biased, so both 20 Ω20\ \Omega branches conduct.
  2. Req=20×2040=10 ΩR_{eq} = \dfrac{20\times 20}{40} = 10\ \Omega
  3. I=510=0.5I = \dfrac{5}{10} = 0.5 A
  4. So the answer is (d) 0.50.5 A.
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Q124JEE Main 2025 · 23 JAN · SHIFT 1Medium

P-N Junction Diode · Diode circuits

Refer to the circuit diagram given in the figure. which of the following observations are correct? A. Total resistance of circuit is 6 Ω6\ \Omega

B. Current in Ammeter is 1 A

C. Potential across ABAB is 4 Volts.

D. Potential across CD is 4 Volts

E. Total resistance of the circuit is 8 Ω8\ \Omega.

Choose the correct answer from the options given below:

Figure

Show answer and solution

Answer: (d)

  1. The diode points from D to A, so it is forward biased (short). Between D and B: 4 Ω∥4 Ω=2 Ω4\ \Omega \parallel 4\ \Omega = 2\ \Omega.
  2. Total resistance =4+2=6 Ω= 4 + 2 = 6\ \Omega, so A is correct and E is wrong.
  3. Ammeter current =66=1= \dfrac{6}{6} = 1 A, so B is correct.
  4. VCD=1×4=4V_{CD} = 1\times 4 = 4 V (D correct); VAB=0.5×4=2V_{AB} = 0.5\times 4 = 2 V (C wrong).
  5. So the answer is (d) A, B and D only.
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Q125JEE Main 2025 · 8 APR · SHIFT 2Medium

P-N Junction Diode · Waveforms & RC circuits

The output voltage in the following circuit is (Consider ideal diode case)

Figure

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Answer: (a)

  1. The output node is pulled toward +5+5 V through the resistor; both diodes have their anodes at this node.
  2. D2D_2's cathode is at 0 V (ground), so D2D_2 is forward biased and, being ideal, clamps the node to 0 V.
  3. D1D_1 then has anode at 0 V and cathode at +5+5 V, so it is reverse biased.
  4. Vout=0V_{out} = 0 V. So the answer is (a).
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Q126MHT CET 2024 · 4 MAY · SHIFT 2Easy

P-N Junction Diode · Depletion layer & barrier

The depletion layer in p-n junction region is caused by

Show answer and solution

Answer: (c)

  1. Electrons diffuse from n to p and holes from p to n because of the concentration difference.
  2. They recombine near the junction and leave behind uncovered immobile ions: this is the depletion layer.
  3. So the answer is (c) diffusion of charge carriers.
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Q127MHT CET 2024 · 2 MAY · SHIFT 2Easy

P-N Junction Diode · Depletion layer & barrier

The potential barrier in p-n junction diode is due to

Show answer and solution

Answer: (d)

  1. After diffusion, fixed positive donor ions remain on the n-side and fixed negative acceptor ions on the p-side.
  2. These opposite charges near the junction create the field and the barrier potential.
  3. So the answer is (d) accumulation of positive and negative charges near the junction.
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Q128MHT CET 2024 · 11 MAY · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

A p-n junction diode cannot be used

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Answer: (d)

  1. A p-n diode works as a rectifier, as a photodiode/solar cell (light to electrical energy) and as an LED (light emission).
  2. It has no gain, so it cannot amplify a signal; amplification needs a transistor.
  3. So the answer is (d) for increasing the amplitude of an a.c. signal.
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Q129MHT CET 2024 · 4 MAY · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

A semiconductor device X is connected in series with a battery and a resistor. The current of 10 mA is found to pass through the circuit. If the terminals of X are connected in reverse manner, the current drops to almost zero. X may be

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Answer: (b)

  1. The device conducts in one direction (10 mA) and almost blocks current when reversed: unidirectional conduction.
  2. Intrinsic or extrinsic semiconductor pieces conduct equally both ways; a Zener under a large enough reverse voltage would conduct strongly.
  3. So the answer is (b) a p-n junction diode.
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Q130JEE Main 2024 · 27 JAN · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

Which of the following circuits is reverse - biased?

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Answer: (d)

  1. Reverse bias: cathode potential >> anode potential.
  2. (a) anode +2 V+2\text{ V}, cathode −10 V-10\text{ V}: forward. (b) anode 00, cathode −5 V-5\text{ V}: forward. (c) anode +2 V+2\text{ V}, cathode 00: forward.
  3. (d) anode +2 V+2\text{ V}, cathode +4 V+4\text{ V}: cathode higher, so reverse biased.
  4. So the answer is (d).
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Q131MHT CET 2024 · 11 MAY · SHIFT 2Easy

P-N Junction Diode · Diode circuits

Assuming that junction diode is ideal, the current in arrangement shown in figure

Figure

Show answer and solution

Answer: (b)

  1. Anode at 3 V3\text{ V}, cathode side at 1 V1\text{ V}: diode is forward biased, ideal so no drop.
  2. I=3−1100=0.02 AI = \dfrac{3 - 1}{100} = 0.02\text{ A}
  3. So the answer is (b) 20 mA20\text{ mA}.
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Q132MHT CET 2024 · 16 MAY · SHIFT 1Medium

P-N Junction Diode · Depletion layer & barrier

If the p-np\text{-}n junction diode is unbiased,

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Answer: (c)

  1. In an unbiased junction the depletion layer has positive donor ions on the n side and negative acceptor ions on the p side.
  2. So the n side is at positive voltage relative to the p side; the field points from n to p.
  3. So the answer is (c).
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Q133JEE Main 2024 · 4 APR · SHIFT 2Medium

P-N Junction Diode · I-V curve & dynamic resistance

Which of the diode circuits shows correct biasing used for the measurement of dynamic resistance of p-n junction diode:

Show answer and solution

Answer: (d)

  1. Dynamic resistance rd=ΔV/ΔIr_d = \Delta V / \Delta I is measured in forward bias, so the battery positive must reach the anode.
  2. (a) Positive (long) plate is on the grounded side, so D4D_4 is reverse biased. (b) Short (negative) plate on top: D1D_1 reverse biased.
  3. (c) Two equal plates form a capacitor, not a cell: no steady bias.
  4. (d) Long (positive) plate on top feeds 5 V5\text{ V} through RR to the anode of D2D_2: forward biased.
  5. So the answer is (d).
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Q134MHT CET 2024 · 15 MAY · SHIFT 2Medium

P-N Junction Diode · Diode circuits

What is the current in the following junction diode circuit?

Figure

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Answer: (b)

  1. The P side is at −5-5 V and the N side is connected (through 500 Ω500\ \Omega) to −2-2 V.
  2. VP<VNV_P < V_N, so the diode is reverse biased and an ideal diode passes no current.
  3. So the answer is (b) zero.
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Q135MHT CET 2024 · 10 MAY · SHIFT 1Medium

P-N Junction Diode · Diode circuits

Two ideal diodes are connected to a battery as shown in the circuit. The current supplied by the battery is

Figure

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Answer: (b)

  1. The right plate of the battery is positive, so current goes up the right side and flows right to left through the branches.
  2. D1D_1 points right: reverse biased for this current, no current in the 20 Ω20\ \Omega branch.
  3. D2D_2 points left: forward biased, so the 40 Ω40\ \Omega branch conducts.
  4. I=1040=0.25I = \dfrac{10}{40} = 0.25 A
  5. So the answer is (b) 0.250.25 A.
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Q136MHT CET 2024 · 9 MAY · SHIFT 1Medium

P-N Junction Diode · Diode circuits

For the diagram shown, the resistance between points A and B when the ideal diode ' DD ' is forward biased is ' R1R_1 ' and that when reverse biased is ' R2R_2 '. The ratio R1R2\frac{R_1}{R_2} is

Figure

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Answer: (b)

  1. Forward bias: diode shorted, 40 Ω∥60 Ω40\ \Omega \parallel 60\ \Omega: R1=40×60100=24 ΩR_1 = \dfrac{40\times 60}{100} = 24\ \Omega.
  2. Reverse bias: diode branch open, R2=60 ΩR_2 = 60\ \Omega.
  3. R1R2=2460=25\dfrac{R_1}{R_2} = \dfrac{24}{60} = \dfrac{2}{5}
  4. So the answer is (b) 25\frac{2}{5}.
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Q137MHT CET 2024 · 3 MAY · SHIFT 1Medium

P-N Junction Diode · Diode circuits

Find the magnitude of current in the given circuit.

Figure

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Answer: (a)

  1. The 44 V cell (positive towards A) tries to drive current from right to left, and the 11 V cell (positive towards B) from left to right.
  2. Net emf =4−1=3= 4 - 1 = 3 V, which drives current from right to left.
  3. The diode points from left to right, so for this current it is reverse biased.
  4. An ideal reverse biased diode allows no current, so I=0I = 0.
  5. So the answer is (a) zero ampere.
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Q138JEE Main 2024 · 4 APR · SHIFT 1Medium

P-N Junction Diode · Diode circuits

The value of net resistance of the network as shown in the given figure is:

Figure

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Answer: (b)

  1. The left end (−6-6 V) is at higher potential than the right end (−8-8 V), so current flows left to right.
  2. The 15 Ω15\ \Omega branch conducts; the 10 Ω10\ \Omega branch diode points right (forward) and conducts; the 5 Ω5\ \Omega branch diode points left (reverse) and is open.
  3. Rnet=15×1015+10=6 ΩR_{net} = \dfrac{15\times 10}{15 + 10} = 6\ \Omega
  4. So the answer is (b) 6 Ω6\ \Omega.
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Q139JEE Main 2024 · 30 JAN · SHIFT 2Medium

P-N Junction Diode · Diode circuits

Figure

In the given circuit, the voltage across load resistance (RL{}_L) is:

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Answer: (a)

  1. Both diodes are forward biased: drop across Ge =0.3= 0.3 V, across Si =0.7= 0.7 V.
  2. I=15−0.3−0.71.5+2.5 kΩ=144000=3.5I = \dfrac{15 - 0.3 - 0.7}{1.5 + 2.5}\text{ k}\Omega = \dfrac{14}{4000} = 3.5 mA
  3. VL=IRL=3.5×10−3×2500=8.75V_L = I R_L = 3.5\times 10^{-3}\times 2500 = 8.75 V
  4. So the answer is (a) 8.758.75 V.
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Q140MHT CET 2023 · 13 MAY · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

On increasing the reverse bias to a large value in a P-N junction diode, current

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Answer: (c)

  1. In reverse bias only a very small, nearly constant saturation current flows.
  2. At the breakdown voltage, Zener or avalanche breakdown makes the current rise suddenly.
  3. So the answer is (c) suddenly increases.
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Q141MHT CET 2023 · 12 MAY · SHIFT 2Easy

P-N Junction Diode · Forward & reverse bias

In which figure, the junction diode is forward biased?

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Answer: (b)

  1. Forward bias: anode (arrow side) at a higher potential than the cathode (bar side).
  2. (a) 5<105 < 10: reverse. (b) −1.0>−1.5-1.0 > -1.5: forward.
  3. (c) 0<10 < 1: reverse. (d) −2<0-2 < 0: reverse.
  4. So the answer is (b).
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Q142MHT CET 2023 · 12 MAY · SHIFT 1Easy

P-N Junction Diode · Forward & reverse bias

When forward bias is applied to a p-n junction, then what happens to the potential barrier (VB)(V_B) and the width (X)(X) of the depletion region?

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Answer: (d)

  1. Forward bias opposes the built-in field, so the barrier becomes VB−VV_B - V, smaller.
  2. Majority carriers are pushed toward the junction, so the depletion width XX also reduces.
  3. So the answer is (d) VBV_B decreases, XX decreases.
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Q143MHT CET 2023 · 11 MAY · SHIFT 2Easy

P-N Junction Diode · Forward & reverse bias

If p-np\text{-}n junction diode is in forward bias then

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Answer: (d)

  1. Forward bias lowers the barrier voltage and pushes majority carriers into the depletion region.
  2. So the depletion layer narrows and conduction occurs.
  3. So the answer is (d) width of depletion layer decreases.
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Q144MHT CET 2023 · 9 MAY · SHIFT 2Easy

P-N Junction Diode · Forward & reverse bias

In the reverse biasing of a p-n junction diode:

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Answer: (b)

  1. Reverse bias pulls holes and electrons away from the junction, exposing more fixed ions.
  2. Carrier numbers are set by doping and temperature, not by bias.
  3. So the answer is (b) the width of the depletion layer increases.
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Q145JEE Main 2023 · 25 JAN · SHIFT 2Medium

P-N Junction Diode · Depletion layer & barrier

Statement I: When a Si sample is doped with Boron, it becomes P type and when doped by Arsenic it becomes N-type semi conductor such that P-type has excess holes and N-type has excess electrons.

Statement II: When such P-type and N-type semi-conductors, are fused to make a junction, a current will automatically flow which can be detected with an externally connected ameter. In the light of above statements, choose the most appropriate answer from the options given below

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Answer: (c)

  1. Statement I: Boron (trivalent) gives p-type with excess holes; Arsenic (pentavalent) gives n-type with excess electrons. Correct.
  2. Statement II: After junction formation, diffusion builds a barrier that stops further net flow; no current flows in an unbiased junction. Incorrect.
  3. So the answer is (c).
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Q146JEE Main 2023 · 6 APR · SHIFT 2Medium

P-N Junction Diode · Forward & reverse bias

Given below are two statements: one is labelled as Assertion A and the other is labelled as Reason R

Assertion A: Diffusion current in a p-n junction is greater than the drift current in magnitude if the junction is forward biased.

Reason R: Diffusion current in a p-n junction is from the nn-side to the p-side if the junction is forward biased.

In the light of the above statements, choose the most appropriate answer from the options given below

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Answer: (b)

  1. Assertion: in forward bias the barrier is lowered, so diffusion current exceeds drift current. Correct.
  2. Reason: holes diffuse p to n and electrons n to p, so the diffusion current is from p side to n side, not n to p. Incorrect.
  3. So the answer is (b).
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Q147MHT CET 2023 · 10 MAY · SHIFT 2Medium

P-N Junction Diode · Diode circuits

For the diagram shown, the resistances between points A and B when ideal diode D is forward biased is 'R1R_1' and that when reverse biased is 'R2R_2'. The ratio R1:R2R_1 : R_2 is

Figure

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Answer: (c)

  1. Forward bias: diode shorted, 40 Ω∥40 Ω40\ \Omega \parallel 40\ \Omega: R1=20 ΩR_1 = 20\ \Omega.
  2. Reverse bias: diode branch open, R2=40 ΩR_2 = 40\ \Omega.
  3. R1:R2=20:40=1:2R_1 : R_2 = 20 : 40 = 1 : 2
  4. So the answer is (c) 1:21:2.
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Q148JEE Main 2023 · 15 APR · SHIFT 1Medium

P-N Junction Diode · Diode circuits

In the given circuit, the current (I) through the battery will be

Figure

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Answer: (d)

  1. Call the left node L, top-right T and bottom-right B. Current leaves the battery at B and returns at L.
  2. D3D_3 (B to L) is forward biased: one 10 Ω10\ \Omega path. D1D_1 (T to L) is forward biased, so B to T (10 Ω10\ \Omega) to L (10 Ω10\ \Omega) is a 20 Ω20\ \Omega path. D2D_2 (L to T) is reverse biased.
  3. Req=10×2010+20=203 ΩR_{eq} = \dfrac{10\times 20}{10 + 20} = \dfrac{20}{3}\ \Omega
  4. I=1020/3=1.5I = \dfrac{10}{20/3} = 1.5 A
  5. So the answer is (d) 1.51.5 A.
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Q149JEE Main 2023 · 10 APR · SHIFT 2Medium

P-N Junction Diode · Diode circuits

If each diode has a forward bias resistance of 25 Ω25\ \Omega in the below circuit,

Figure

Which of the following options is correct:

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Answer: (b)

  1. D1D_1 and D3D_3 are forward biased; D2D_2 is reverse biased, so I3=0I_3 = 0.
  2. Each conducting branch: 25+125=150 Ω25 + 125 = 150\ \Omega; two in parallel give 75 Ω75\ \Omega. Total =75+25=100 Ω= 75 + 25 = 100\ \Omega.
  3. I1=5100=0.05I_1 = \dfrac{5}{100} = 0.05 A, split equally: I2=I4=0.025I_2 = I_4 = 0.025 A
  4. I1I2=2\dfrac{I_1}{I_2} = 2
  5. So the answer is (b) I1I2=2\frac{I_1}{I_2} = 2.
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Q150JEE Main 2022 · 29 JUL · SHIFT 1Easy

P-N Junction Diode · Depletion layer & barrier

If the potential barrier across a p-n junction is 0.6 V0.6\text{ V}. Then the electric field intensity, in the depletion region having the width of 6×10−6 m6 \times 10^{-6}\text{ m}, will be __________ ×105 N/C\times 10^{5}\text{ N/C}.

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 1

  1. E=VdE = \dfrac{V}{d}
  2. E=0.66×10−6=1×105 N/CE = \dfrac{0.6}{6 \times 10^{-6}} = 1 \times 10^{5}\ \text{N/C}
  3. So the answer is 11 (i.e. 1×105 N/C1 \times 10^{5}\ \text{N/C}).
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Q151JEE Main 2022 · 28 JUN · SHIFT 1Easy

P-N Junction Diode · I-V curve & dynamic resistance

For using a multimeter to identify diode from electrical components, choose the correct statement out of the following about the diode:

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Answer: (b)

  1. A diode has two terminals (anode, cathode).
  2. A multimeter shows low resistance in one direction (forward) and very high resistance in the other (reverse).
  3. So it conducts in one direction only: the answer is (b).
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Q152JEE Main 2022 · 26 JUN · SHIFT 1Medium

P-N Junction Diode · I-V curve & dynamic resistance

The I-V characteristics of a p-n junction diode in forward bias is shown in the figure. The ratio of dynamic resistance, corresponding to forward bias voltage of 2 V and 4 V respectively, is:

Figure

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Answer: (b)

  1. Dynamic resistance rd=ΔVΔIr_d = \dfrac{\Delta V}{\Delta I}, taken from the small segment of the curve near each voltage.
  2. Near 22 V: r1=2.1−2(10−5)×10−3=0.15×10−3=20 Ωr_1 = \dfrac{2.1 - 2}{(10 - 5)\times 10^{-3}} = \dfrac{0.1}{5\times 10^{-3}} = 20\ \Omega
  3. Near 44 V: r2=4.2−4(250−200)×10−3=0.250×10−3=4 Ωr_2 = \dfrac{4.2 - 4}{(250 - 200)\times 10^{-3}} = \dfrac{0.2}{50\times 10^{-3}} = 4\ \Omega
  4. r1:r2=20:4=5:1r_1 : r_2 = 20 : 4 = 5 : 1
  5. So the answer is (b) 5:15:1.
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Q153MHT CET 2022 · 11 AUG · SHIFT 2Medium

P-N Junction Diode · Diode circuits

The given circuit has two ideal diodes D1D_1 and D2D_2 connected as shown in the figure. The current flowing through the resistance R1R_1 will be

Figure

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Answer: (c)

  1. The top terminal of the battery is positive, so current flows through R1R_1 to the top junction.
  2. D1D_1 points down (forward), so the R2R_2 branch conducts; D2D_2 points up (reverse), so the R3R_3 branch is open.
  3. Total resistance =R1+R2=2+3=5 Ω= R_1 + R_2 = 2 + 3 = 5\ \Omega
  4. I=105=2I = \dfrac{10}{5} = 2 A through R1R_1.
  5. So the answer is (c) 22 A.
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Q154NEET 2022 · PHASE 1Medium

P-N Junction Diode · Diode circuits

Figure

In the given circuits (a), (b) and (c), the potential drop across the two p-n junctions are equal in

Show answer and solution

Answer: (d)

  1. (a) P-N and P-N in the same direction: both junctions are biased the same way and carry the same current, so their drops are equal.
  2. (b) P-N and N-P: one junction is forward and the other reverse biased; almost all the voltage appears across the reverse biased one, so drops are unequal.
  3. (c) N-P and N-P in the same direction: both are biased the same way, so drops are equal.
  4. So the answer is (d) both circuits (a) and (c).
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Q155JEE Main 2022 · 25 JUL · SHIFT 2Medium

P-N Junction Diode · Diode circuits

Two ideal diodes are connected in the network as shown in figure. The equivalent resistance between A and B is __________ Ω\Omega.

Figure

Numerical answer type. Work it out, then open the answer.

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Answer: 25

  1. A is positive and B is negative.
  2. The left diode (anode at A's junction) is forward biased: it acts as a short, so the left junction and the top node are the same point.
  3. The right diode (anode at B's junction) is reverse biased: it acts as an open circuit.
  4. Now the two 20 Ω20\ \Omega resistors both join the A-node to the bottom node: 20∥20=10 Ω20 \parallel 20 = 10\ \Omega.
  5. This is in series with 15 Ω15\ \Omega: RAB=10+15=25 ΩR_{AB} = 10 + 15 = 25\ \Omega.
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Q156JEE Main 2022 · 27 JUN · SHIFT 2Medium

P-N Junction Diode · Diode circuits

The cut-off voltage of the diodes (shown in figure) in forward bias is 0.6 V. The current through the resistor of 40 Ω\Omega is __________ mA.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 4

  1. D1D_1 and D2D_2 face opposite ways, so for either battery polarity exactly one branch conducts: one 60 Ω60\ \Omega resistor plus one diode.
  2. That diode needs its cut-in voltage 0.60.6 V, leaving 1−0.6=0.41 - 0.6 = 0.4 V for the resistors.
  3. Series resistance =60+40=100 Ω= 60 + 40 = 100\ \Omega.
  4. I=0.4100=4×10−3I = \frac{0.4}{100} = 4 \times 10^{-3} A =4= 4 mA.
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Q157JEE Main 2022 · 26 JUN · SHIFT 1Medium

P-N Junction Diode · Diode circuits

As per the given circuit, the value of current through the battery will be ____________ A.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 1

  1. With the battery's lower terminal positive, current enters through the 2 Ω2\ \Omega resistor to the bottom-right node.
  2. Path 1: through D3D_3 (forward), 6 Ω+10 Ω=16 Ω6\ \Omega + 10\ \Omega = 16\ \Omega to the upper-left node.
  3. Path 2: through the 10 Ω10\ \Omega resistor, then D1D_1 (forward) and its 6 Ω6\ \Omega: 16 Ω16\ \Omega. D2D_2 is reverse biased and carries no current.
  4. Req=2+(16∥16)=2+8=10 ΩR_{eq} = 2 + (16 \parallel 16) = 2 + 8 = 10\ \Omega.
  5. I=1010=1I = \frac{10}{10} = 1 A.
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Q158JEE Main 2022 · 29 JUN · SHIFT 2Difficult

P-N Junction Diode · Depletion layer & barrier

A potential barrier of 0.4 V exists across a p-n junction. An electron enters the junction from the n- side with a speed of 6.0 ×\times 105 ms−1{}^{-1}. The speed with which electron enters the p side will be x3×105\frac{x}{3} \times 10^{5} ms−1{}^{-1} the value of x is _____________.

(Given mass of electron = 9 ×\times 10−-31 kg, charge on electron = 1.6 ×\times 10−-19 C.)

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 14

  1. Moving from n-side to p-side, the electron loses kinetic energy eVeV at the barrier.
  2. Initial KE =12(9×10−31)(6×105)2=1.62×10−19= \frac{1}{2}(9 \times 10^{-31})(6 \times 10^{5})^2 = 1.62 \times 10^{-19} J.
  3. Loss =eV=1.6×10−19×0.4=0.64×10−19= eV = 1.6 \times 10^{-19} \times 0.4 = 0.64 \times 10^{-19} J, so final KE =0.98×10−19= 0.98 \times 10^{-19} J.
  4. v2=2×0.98×10−199×10−31=2.18×1011⇒v=4.67×105=143×105v^2 = \frac{2 \times 0.98 \times 10^{-19}}{9 \times 10^{-31}} = 2.18 \times 10^{11} \Rightarrow v = 4.67 \times 10^5 = \frac{14}{3} \times 10^5 m/s.
  5. So x=14x = 14.
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Q159JEE Main 2022 · 28 JUN · SHIFT 2Difficult

P-N Junction Diode · Waveforms & RC circuits

In the given circuit the input voltage Vin is shown in figure. The cut-in voltage of p-n junction diode (D1 or D2) is 0.6 V. Which of the following output voltage (V0) waveform across the diode is correct?

Figure

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Answer: (d)

  1. D1D_1 and D2D_2 are in parallel with opposite orientation across the output.
  2. Positive half: one diode turns on once Vin>0.6V_{in} > 0.6 V, so V0V_0 is clipped at +0.6+0.6 V.
  3. Negative half: the other diode turns on, so V0V_0 is clipped at −0.6-0.6 V.
  4. Output follows the input up to ±0.6\pm 0.6 V and is flat beyond it. So the answer is (d).
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Q160JEE Main 2021 · 20 JUL · SHIFT 2Medium

P-N Junction Diode · I-V curve & dynamic resistance

For the forward biased diode characteristics shown in the figure, the dynamic resistance at ID = 3 mA will be __________ Ω\Omega.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 25

  1. Dynamic resistance rd=ΔVDΔIDr_d = \dfrac{\Delta V_D}{\Delta I_D} on the straight part of the curve around 33 mA.
  2. From the graph, IDI_D goes from 33 mA to 55 mA while VDV_D goes from 0.700.70 V to 0.750.75 V.
  3. rd=0.75−0.70(5−3)×10−3=0.052×10−3=25 Ωr_d = \dfrac{0.75 - 0.70}{(5 - 3)\times 10^{-3}} = \dfrac{0.05}{2\times 10^{-3}} = 25\ \Omega
  4. So the dynamic resistance is 25 Ω25\ \Omega.
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Q161MHT CET 2021 · 24 SEP · SHIFT 1Medium

P-N Junction Diode · Diode circuits

Two identical ideal diodes are connected to an ammeter and a d.c source (1 volt) as shown. In which one of the following circuits, ammeter will not show any deflection?

Figure

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Answer: (b)

  1. In circuit (a) the two diodes face opposite ways in series (back to back).
  2. Whatever the battery polarity, one of them is always reverse biased, so no current flows.
  3. In (b) both are forward biased in series; in (c) and (d) at least one parallel diode is forward biased, so current flows.
  4. So the answer is (b), i.e. circuit (a).
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Q162MHT CET 2021 · 23 SEP · SHIFT 1Medium

P-N Junction Diode · Diode circuits

What are the values of the currents flowing in each of the following diode circuits X\text{X} and Y\text{Y} respectively? (Assume that the diodes are ideal)

Figure

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Answer: (c)

  1. Circuit X: both diodes are forward biased, so the two 4 Ω4\ \Omega branches are in parallel: R=2 ΩR = 2\ \Omega, IX=82=4I_X = \dfrac{8}{2} = 4 A.
  2. Circuit Y: D2D_2 is reversed, so only the D1D_1 branch conducts: R=4 ΩR = 4\ \Omega, IY=84=2I_Y = \dfrac{8}{4} = 2 A.
  3. So the answer is (c) 44 A, 22 A.
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Q163MHT CET 2021 · 21 SEP · SHIFT 2Medium

P-N Junction Diode · Diode circuits

In an ideal junction diode, the current flowing through PQ is

Figure

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Answer: (c)

  1. The anode is at P (+3+3 V) and the circuit ends at Q (−5-5 V), so the diode is forward biased.
  2. I=VP−VQR=3−(−5)2×103I = \dfrac{V_P - V_Q}{R} = \dfrac{3 - (-5)}{2\times 10^{3}}
  3. I=82000=4×10−3I = \dfrac{8}{2000} = 4\times 10^{-3} A
  4. So the answer is (c) 4×10−34\times 10^{-3} A.
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Q164MHT CET 2021 · 21 SEP · SHIFT 1Medium

P-N Junction Diode · Diode circuits

The current in the following circuit is

Figure

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Answer: (d)

  1. The anode is at +5+5 V and the other end is at +3+3 V, so the diode is forward biased (ideal, zero drop).
  2. I=5−3200=2200=10−2I = \dfrac{5 - 3}{200} = \dfrac{2}{200} = 10^{-2} A
  3. So the answer is (d) 10−210^{-2} A.
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Q165JEE Main 2021 · 1 SEP · SHIFT 2Medium

P-N Junction Diode · Diode circuits

In the given figure, each diode has a forward bias resistance of 30Ω\Omega and infinite resistance in reverse bias. The current I1 will be:

Figure

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Answer: (c)

  1. The top two diodes are forward biased; the third is reverse biased (open).
  2. Each conducting branch: 30+130=160 Ω30 + 130 = 160\ \Omega; two in parallel give 80 Ω80\ \Omega.
  3. Total =80+20=100 Ω= 80 + 20 = 100\ \Omega
  4. I1=200100=2I_1 = \dfrac{200}{100} = 2 A
  5. So the answer is (c) 22 A.
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Q166JEE Main 2021 · 25 FEB · SHIFT 1Medium

P-N Junction Diode · Diode circuits

A 5V battery is connected across the points X and Y. Assume D1 and D2 to be normal silicon diodes. Find the current supplied by the battery if the +ve terminal of the battery is connected to point X.

Figure

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Answer: (c)

  1. With X positive, current flows up the left side and left to right through the branches.
  2. D1D_1 points right: forward biased (Si drop ≈0.7\approx 0.7 V), 10 Ω10\ \Omega branch conducts. D2D_2 points left: reverse biased, no current.
  3. I=5−0.710=0.43I = \dfrac{5 - 0.7}{10} = 0.43 A
  4. So the answer is (c) ∼0.43\sim 0.43 A.
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Q167JEE Main 2021 · 26 FEB · SHIFT 1Medium

P-N Junction Diode · Diode circuits

The circuit contains two diodes each with a forward resistance of 50Ω\Omega and with infinite reverse resistance. If the battery voltage is 6V, the current through the 120Ω\Omega resistance is ____________ mA.

Figure

Numerical answer type. Work it out, then open the answer.

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Answer: 20

  1. The battery's positive terminal is on the left, so D1D_1 is forward biased and D2D_2 is reverse biased (open).
  2. Current flows through D1D_1 (50 Ω50\ \Omega), 130 Ω130\ \Omega and 120 Ω120\ \Omega in series: R=50+130+120=300 ΩR = 50 + 130 + 120 = 300\ \Omega.
  3. I=6300=0.02I = \frac{6}{300} = 0.02 A =20= 20 mA.
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Q168JEE Main 2021 · 24 FEB · SHIFT 1Medium

P-N Junction Diode · Diode circuits

In connection with the circuit drawn below, the value of current flowing through 2 kΩ\Omega resistor is _________ ×\times 10−-4 A.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 25

  1. Without the Zener, the voltage across 2 kΩ2\ k\Omega would be 10×23=6.6710 \times \frac{2}{3} = 6.67 V, which is above 55 V, so the Zener breaks down.
  2. The Zener holds the voltage across the 2 kΩ2\ k\Omega resistor at 55 V.
  3. I=52000=2.5×10−3I = \frac{5}{2000} = 2.5 \times 10^{-3} A =25×10−4= 25 \times 10^{-4} A.
  4. So the answer is 25.
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Q169NEET 2020 · PHASE 1Easy

P-N Junction Diode · Depletion layer & barrier

The increase in the width of the depletion region in a p-n junction diode is due to:

Show answer and solution

Answer: (a)

  1. Reverse bias pulls majority carriers away from the junction, so the depletion width increases.
  2. Forward bias (and larger forward current) reduces the width.
  3. So the answer is (a) reverse bias only.
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Q170NEET 2020 · PHASE 2Easy

P-N Junction Diode · Forward & reverse bias

Out of the following which one is a forward biased diode?

Show answer and solution

Answer: (a)

  1. A diode is forward biased when its anode (p side, triangle) is at a higher potential than its cathode (n side, bar): Vp>VnV_p > V_n.
  2. (a) Vp=0 V>Vn=−3 VV_p = 0\text{ V} > V_n = -3\text{ V}: forward.
  3. (b) −4 V<−2 V-4\text{ V} < -2\text{ V}, (c) 2 V<5 V2\text{ V} < 5\text{ V}, (d) −2 V<+2 V-2\text{ V} < +2\text{ V}: all reverse.
  4. So the answer is (a).
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Q171JEE Main 2020 · 3 SEP · SHIFT 1Easy

P-N Junction Diode · Diode circuits

When a diode is forward biased, it has a voltage drop of 0.5 V. The safe limit of current through the diode is 10 mA. If a battery of emf 1.5 V is used in the circuit, the value of minimum resistance to be connected in series with the diode so that the current does not exceed the safe limit is

Show answer and solution

Answer: (d)

  1. Voltage across series resistor =1.5−0.5=1.0 V= 1.5 - 0.5 = 1.0\text{ V}.
  2. Rmin=1.010×10−3=100 ΩR_{min} = \dfrac{1.0}{10 \times 10^{-3}} = 100\ \Omega
  3. So the answer is (d) 100 Ω100\ \Omega.
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Q172JEE Main 2020 · 3 SEP · SHIFT 2Medium

P-N Junction Diode · I-V curve & dynamic resistance

Which of the following will NOT be observed when a multimeter (operating in resistance measuring mode) probes connected across a component, are just reversed?

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Answer: (d)

  1. Metal wire and resistor are ohmic, so the reading is the same for both probe directions.
  2. LED conducts (and glows) only when forward biased, so it deflects in one direction only.
  3. A capacitor charges through the meter each time the probes are connected, so the needle gives a momentary deflection in both cases before returning.
  4. Hence 'no deflection in both cases' for a capacitor is not observed.
  5. So the answer is (d).
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Q173JEE Main 2020 · 9 JAN · SHIFT 2Medium

P-N Junction Diode · Diode circuits

The current i in the network is:

Figure

Show answer and solution

Answer: (b)

  1. For the battery polarity shown, both diodes are reverse biased, so their branches (5 Ω5\ \Omega top-left and 20 Ω20\ \Omega bottom-right) carry no current.
  2. The remaining path is 10 Ω10\ \Omega (left to bottom), 5 Ω5\ \Omega (bottom to top), 10 Ω10\ \Omega (top to right), all in series: 25 Ω25\ \Omega.
  3. Total with the external 5 Ω5\ \Omega: R=30 ΩR = 30\ \Omega
  4. i=930=0.3i = \dfrac{9}{30} = 0.3 A
  5. So the answer is (b) 0.30.3 A.
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Q174JEE Main 2020 · 7 JAN · SHIFT 2Medium

P-N Junction Diode · Diode circuits

In the figure, potential difference between A and B is:

Figure

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Answer: (a)

  1. The diode is forward biased (ideal, short), so the two 10 kΩ10\text{ k}\Omega resistors from A to B are in parallel: 5 kΩ5\text{ k}\Omega.
  2. Total =10+5=15 kΩ= 10 + 5 = 15\text{ k}\Omega, so I=3015 kΩ=2I = \dfrac{30}{15\text{ k}\Omega} = 2 mA
  3. VAB=2×10−3×5×103=10V_{AB} = 2\times 10^{-3}\times 5\times 10^{3} = 10 V
  4. So the answer is (a) 1010 V.
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Q175JEE Main 2020 · 9 JAN · SHIFT 2Difficult

P-N Junction Diode · Waveforms & RC circuits

Two identical capacitors A and B, charged to the same potential 5V are connected in two different circuits as shown below at time t = 0. If the charge on capacitors A and B at time t = CR is QA and QB respectively, then (Here e is the base of natural logarithm)

Figure

Show answer and solution

Answer: (c)

  1. The capacitor discharges by sending current out of its ++ plate, through RR, and back through the diode to the −- plate (upward through the diode).
  2. In circuit A the diode points downward, so this current reverse biases it: no discharge, QA=CVQ_A = CV.
  3. In circuit B the diode points upward, so it is forward biased and CC discharges through RR: Q=CVe−t/RCQ = CV e^{-t/RC}.
  4. At t=RCt = RC: QB=CVeQ_B = \frac{CV}{e}. So the answer is (c).
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Q176JEE Main 2020 · 9 JAN · SHIFT 1Difficult

P-N Junction Diode · Waveforms & RC circuits

Both the diodes used in the circuit shown are assumed to be ideal and have negligible resistance when these are forward biased. Built in potential in each diode is 0.7 V. For the input voltages shown in the figure, the voltage (in Volts) at point A is __________.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 12

  1. The left diode has its anode at 12.712.7 V and cathode at A, so it is forward biased.
  2. VA=12.7−0.7=12V_A = 12.7 - 0.7 = 12 V.
  3. The right diode has anode at 44 V and cathode at A (1212 V), so it is reverse biased and does not affect A.
  4. VA=12V_A = 12 V.
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Q177MHT CET 2019 · 2 MAY · SHIFT 2Easy

P-N Junction Diode · Depletion layer & barrier

In case of pp-n junction diode, the width of depletion region is

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Answer: (b)

  1. Heavy doping makes the depletion layer thinner, light doping makes it wider, so (a) is true in itself but (c) is false.
  2. Reverse bias widens the depletion region; forward bias narrows it.
  3. The standard expected answer is (b) increased by reverse biasing.
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Q178MHT CET 2019 · 2 MAY · SHIFT 1Easy

P-N Junction Diode · Diode circuits

Assuming that the junction diode is ideal, the current in the arrangement shown in figure is

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Answer: (c)

  1. Anode at +3 V+3\text{ V}, other end at +1 V+1\text{ V}: forward biased; ideal diode has zero resistance.
  2. I=3−1100=0.02 A=20 mAI = \dfrac{3 - 1}{100} = 0.02\text{ A} = 20\text{ mA}
  3. So the answer is (c) 20 mA20\text{ mA}.
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Q179JEE Main 2019 · 11 JAN · SHIFT 2Medium

P-N Junction Diode · Diode circuits

The circuit shown below contains two ideal diodes, each with a forward resistance of 50 Ω\Omega. If the battery voltage is 6 V, the current through the 100 Ω\Omega resistance (in Amperes) is:

Figure

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Answer: (d)

  1. The left terminal of the battery is positive. D1D_1 points right (forward, 50 Ω50\ \Omega); D2D_2 points left (reverse, open).
  2. Total resistance =100+150+50=300 Ω= 100 + 150 + 50 = 300\ \Omega
  3. I=6300=0.02I = \dfrac{6}{300} = 0.02 A
  4. So the answer is (d) 0.0200.020 A.
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Q180JEE Main 2019 · 9 JAN · SHIFT 2Difficult

P-N Junction Diode · Diode circuits

Ge and Si diodes start conducting at 0.3 V and 0.7 V respectively. In the following figure if Ge diode connection are reversed, the value of V0 changes by: (assume that the Ge diode has large breakdown voltage)

Figure

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Answer: (d)

  1. Both diodes are forward biased and in parallel; the Ge diode turns on first at 0.30.3 V and fixes the drop.
  2. So V0=12−0.3=11.7V_0 = 12 - 0.3 = 11.7 V.
  3. With Ge reversed, it blocks and only Si conducts: V0=12−0.7=11.3V_0 = 12 - 0.7 = 11.3 V.
  4. Change =11.7−11.3=0.4= 11.7 - 11.3 = 0.4 V. So the answer is (d).
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Q181NEET 2018Medium

P-N Junction Diode · I-V curve & dynamic resistance

In a p-n junction diode, change in temperature due to heating

Show answer and solution

Answer: (d)

  1. Heating generates more electron-hole pairs: reverse (minority) current increases.
  2. Barrier potential falls, so forward current rises at the same voltage (forward resistance changes too).
  3. Both regions change, so the whole V-I characteristic is affected: the answer is (d).
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Q182JEE Main 2018Medium

P-N Junction Diode · Diode circuits

The reading of the ammeter for a silicon diode in the given circuit is:

Figure

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Answer: (d)

  1. The silicon diode is forward biased, so it takes 0.70.7 V.
  2. I=3−0.7200=2.3200=0.0115I = \dfrac{3 - 0.7}{200} = \dfrac{2.3}{200} = 0.0115 A
  3. I=11.5I = 11.5 mA
  4. So the answer is (d) 11.511.5 mA.
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Q183NEET 2017Easy

P-N Junction Diode · Forward & reverse bias

Which one of the following represents forward bias diode?

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Answer: (d)

  1. Forward bias needs anode (triangle side) at higher potential than cathode (bar side).
  2. (a) −4 V<−3 V-4\text{ V} < -3\text{ V}, (b) −2 V<+2 V-2\text{ V} < +2\text{ V}, (c) 3 V<5 V3\text{ V} < 5\text{ V}: reverse biased.
  3. (d) 0 V>−2 V0\text{ V} > -2\text{ V}: anode is higher, so forward biased.
  4. So the answer is (d).
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Q184JEE Main 2017 · 8 APR · SHIFT 1Medium

P-N Junction Diode · I-V curve & dynamic resistance

The V-I characteristic of a diode is shown in the figure. The ratio of forward to reverse bias resistance is:

Figure

Show answer and solution

Answer: (b)

  1. Forward resistance from the linear part: Rf=ΔVΔI=0.8−0.7(20−10)×10−3=10 ΩR_f = \dfrac{\Delta V}{\Delta I} = \dfrac{0.8 - 0.7}{(20 - 10)\times 10^{-3}} = 10\ \Omega
  2. Reverse resistance: Rr=10 V1 μA=107 ΩR_r = \dfrac{10\text{ V}}{1\ \mu\text{A}} = 10^{7}\ \Omega
  3. RfRr=10107=10−6\dfrac{R_f}{R_r} = \dfrac{10}{10^{7}} = 10^{-6}
  4. So the answer is (b) 10−610^{-6}.
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Q185NEET 2016 · PHASE 1Easy

P-N Junction Diode · Diode circuits

Consider the junction diode as ideal. The value of current flowing through AB is

Figure

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Answer: (d)

  1. A at +4 V+4\text{ V} (anode), B at −6 V-6\text{ V}: diode forward biased, ideal so zero drop.
  2. I=4−(−6)1000=101000 AI = \dfrac{4 - (-6)}{1000} = \dfrac{10}{1000}\text{ A}
  3. I=10−2 AI = 10^{-2}\text{ A}, so the answer is (d).
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Q186NEET 2016 · PHASE 2Medium

P-N Junction Diode · Diode circuits

The given circuit has two ideal diodes connected as shown in the figure. The current flowing through the resistance R1 will be

Figure

Show answer and solution

Answer: (a)

  1. The top terminal of the 1010 V battery is positive, so current flows through R1R_1 to the top junction.
  2. D1D_1 points up (reverse biased), so the R2R_2 branch is open; D2D_2 points down (forward biased), so the R3R_3 branch conducts.
  3. Total resistance =R1+R3=2+2=4 Ω= R_1 + R_3 = 2 + 2 = 4\ \Omega
  4. I=104=2.5I = \dfrac{10}{4} = 2.5 A
  5. So the answer is (a) 2.52.5 A.
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Q187JEE Main 2015 · 10 APR · SHIFT 1Easy

P-N Junction Diode · Depletion layer & barrier

In an unbiased n-p junction electrons diffuse from n - region to p - region because:

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Answer: (c)

  1. Diffusion is driven by a concentration gradient, not by attraction or potential difference.
  2. Electrons are majority carriers in n and minority in p, so they diffuse from n to p.
  3. So the answer is (c) electron concentration in n-region is more than in p-region.
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Q188NEET 2015 · AIPMTEasy

P-N Junction Diode · Diode circuits

In the given figure, a diode D is connected to an external resistance R = 100 Ω\Omega and an e.m.f. of 3.5 V. If the barrier potential developed across the diode is 0.5 V, the current in the circuit will be

Figure

Show answer and solution

Answer: (c)

  1. The diode is forward biased; voltage left for the resistor =3.5−0.5=3.0 V= 3.5 - 0.5 = 3.0\text{ V}.
  2. I=3.0100=0.03 AI = \dfrac{3.0}{100} = 0.03\text{ A}
  3. So the answer is (c) 30 mA30\text{ mA}.
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Q189JEE Main 2015 · 11 APR · SHIFT 1Medium

P-N Junction Diode · Diode circuits

A 2V battery is connected across AB as shown in the figure. The value of the current supplied by the battery when in one case battery's positive terminal is connected to A and in other case when positive terminal of battery is connected to B will respectively be:

Figure

Show answer and solution

Answer: (b)

  1. An ideal diode conducts only when its p-side (anode) is at higher potential.
  2. Positive terminal at A: D1D_1 is forward biased and D2D_2 is reverse biased, so only the 5 Ω5\ \Omega branch conducts: I=25=0.4I = \frac{2}{5} = 0.4 A.
  3. Positive terminal at B: D2D_2 conducts and D1D_1 is blocked, so only the 10 Ω10\ \Omega branch conducts: I=210=0.2I = \frac{2}{10} = 0.2 A.
  4. So the answer is (b) 0.4 A and 0.2 A.
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Q190NEET 2015 · AIPMT · CANCELLED PAPERMedium

P-N Junction Diode · Waveforms & RC circuits

If in a p-n junction, a square input signal of 10 V is applied, as shown,

Figure

then the output across RL will be

Show answer and solution

Answer: (b)

  1. The diode is forward biased when the input is +5+5 V, so RLR_L gets +5+5 V.
  2. When the input is −5-5 V the diode is reverse biased, no current flows, so the output is 00.
  3. The output is a pulse from 0 to +5+5 V. So the answer is (b).
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Q191JEE Main 2014Easy

P-N Junction Diode · Forward & reverse bias

The forward biased diode connection is:

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Answer: (a)

  1. Forward bias: anode potential >> cathode potential.
  2. (a) +2 V>−2 V+2\text{ V} > -2\text{ V}: forward.
  3. (b) −3=−3 V-3 = -3\text{ V}: no bias. (c) 2<4 V2 < 4\text{ V}, (d) −2<+2 V-2 < +2\text{ V}: reverse.
  4. So the answer is (a).
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Q192NEET 2014 · AIPMTMedium

P-N Junction Diode · Depletion layer & barrier

The barrier potential of a p-n junction depends on

(1) type of semiconductor material

(2) amount of doping

(3) temperature

Which one of the following is correct?

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Answer: (d)

  1. (1) Material: Ge (≈0.3 V\approx 0.3\text{ V}) and Si (≈0.7 V\approx 0.7\text{ V}) have different barriers.
  2. (2) Doping: heavier doping gives a larger barrier potential.
  3. (3) Temperature: barrier falls by about 2 mV/∘C2\text{ mV/}^\circ\text{C}.
  4. So the answer is (d) (1), (2) and (3).
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Q193JEE Main 2014Difficult

P-N Junction Diode · I-V curve & dynamic resistance

The current voltage relation of diode is given by I=(e1000V/T−1) mA,I = \left(e^{1000V/T} - 1\right)\text{ mA}, where the applied voltage VV is in volts and the temperature TT is in degree kelvin. If a student makes an error measuring ±0.01 V\pm 0.01\,V while measuring the current of 5 mA5\,mA at 300 K,300\,K, what will be the error in the value of current in mAmA?

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Answer: (a)

  1. Differentiate: dIdV=1000Te1000V/T=1000T(I+1)\frac{dI}{dV} = \frac{1000}{T} e^{1000V/T} = \frac{1000}{T}(I + 1) mA/V.
  2. At I=5I = 5 mA and T=300T = 300 K: dIdV=1000300×6=20\frac{dI}{dV} = \frac{1000}{300} \times 6 = 20 mA/V.
  3. ΔI=20×0.01=0.2\Delta I = 20 \times 0.01 = 0.2 mA.
  4. So the answer is (a) 0.20.2 mA.
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Q194NEET 2013Easy

P-N Junction Diode · Depletion layer & barrier

In an unbiased p-n junction, holes diffuse from the p-region to n-region because of

Show answer and solution

Answer: (b)

  1. Diffusion always occurs from higher to lower concentration.
  2. Holes are majority carriers in the p-region and minority in the n-region, so they diffuse from p to n.
  3. So the answer is (b) the higher hole concentration in p-region than in n-region.
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Q195JEE Main 2013 · 22 APR · SHIFT 1Medium

P-N Junction Diode · Diode circuits

Figure shows a circuit in which three identical diodes are used. Each diode has forward resistance of 20Ω\Omega and infinite backward resistance. Resistors R1=R2=R3=50 ΩR_1 = R_2 = R_3 = 50\ \Omega. Battery voltage is 6 V. The current through R3R_3 is:

Figure

Show answer and solution

Answer: (a)

  1. Battery's positive terminal is on the left, so D1D_1 is forward biased.
  2. In the middle branch D3D_3 faces opposite to D2D_2, so it is reverse biased and that branch carries no current.
  3. Total resistance in the loop: RD1+R1+R3=20+50+50=120 ΩR_{D1} + R_1 + R_3 = 20 + 50 + 50 = 120\ \Omega.
  4. I=6120=0.05I = \frac{6}{120} = 0.05 A =50= 50 mA, and all of it flows through R3R_3.
  5. So the answer is (a) 50 mA.
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Q196NEET 2012 · AIPMT · PRELIMSMedium

P-N Junction Diode · Diode circuits

Two ideal diodes are connected to a battery as shown in the circuit. The current supplied by the battery is

Figure

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Answer: (d)

  1. The left terminal of the battery is positive, so current flows left to right through the branches.
  2. D1D_1 points right (forward), so the 10 Ω10\ \Omega branch conducts; D2D_2 points left (reverse), so the 20 Ω20\ \Omega branch is open.
  3. I=510=0.5I = \dfrac{5}{10} = 0.5 A
  4. So the answer is (d) 0.50.5 A.
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Q197NEET 2011 · AIPMT · PRELIMSEasy

P-N Junction Diode · Forward & reverse bias

In forward biasing of the p-n junction

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Answer: (d)

  1. In forward bias the positive terminal is joined to the p side and the negative terminal to the n side.
  2. The applied field opposes the built-in field, so the barrier falls and the depletion region becomes thin.
  3. So the answer is (d).
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Q198NEET 2011 · AIPMT · MAINSMedium

P-N Junction Diode · Forward & reverse bias

In the following figure, the diodes which are forward biased, are

Figure

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Answer: (c)

  1. Forward bias: anode potential >> cathode potential.
  2. (A) cathode +5 V+5\text{ V}, anode side +10 V+10\text{ V}: forward. (B) anode −10 V-10\text{ V}, cathode 00: reverse.
  3. (C) cathode −12 V-12\text{ V}, anode side −5 V-5\text{ V}: forward. (D) anode 00, cathode side +5 V+5\text{ V}: reverse.
  4. So the answer is (c) (C) and (A).
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Q199JEE Main 2007 · AIEEEMedium

P-N Junction Diode · Waveforms & RC circuits

If in a p-np\text{-}n junction diode, a square input signal of 10 V10\text{ V} is applied as shown

Figure

Then the output signal across RLR_L will be

Show answer and solution

Answer: (a)

  1. For input +5+5 V the diode is forward biased and the full +5+5 V appears across RLR_L.
  2. For input −5-5 V the diode is reverse biased, current is zero, so the output across RLR_L is 0.
  3. The output is a square pulse between 0 and +5+5 V. So the answer is (a).
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Q200NEET 2006 · AIPMTEasy

P-N Junction Diode · Forward & reverse bias

Which one of the following represents forward bias diode?

Show answer and solution

Answer: (d)

  1. Forward bias: anode potential >> cathode potential.
  2. (a) −2 V<+2 V-2\text{ V} < +2\text{ V}, (b) −4 V<−3 V-4\text{ V} < -3\text{ V}, (c) 3 V<5 V3\text{ V} < 5\text{ V}: reverse.
  3. (d) 0 V>−2 V0\text{ V} > -2\text{ V}: forward.
  4. So the answer is (d).
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Q201JEE Main 2006 · AIEEEEasy

P-N Junction Diode · Forward & reverse bias

In the following, which one of the diodes is reverse biased?

Show answer and solution

Answer: (d)

  1. Reverse bias: cathode potential >> anode potential.
  2. (a) cathode +5 V+5\text{ V}, anode +10 V+10\text{ V}: forward. (b) cathode −10 V-10\text{ V}, anode −5 V-5\text{ V}: forward. (c) anode 00, cathode −10 V-10\text{ V}: forward.
  3. (d) anode 00 (ground), cathode +5 V+5\text{ V}: reverse biased.
  4. So the answer is (d).
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Q202JEE Main 2006 · AIEEEEasy

P-N Junction Diode · Diode circuits

The circuit has two oppositively connected ideal diodes in parallel. What is the current following in the circuit?

Figure

Show answer and solution

Answer: (b)

  1. Current leaves the battery through 4 Ω4\ \Omega and tries to go down both branches.
  2. D1D_1 points upward, so it is reverse biased (open); D2D_2 points downward, so it conducts (ideal, zero resistance).
  3. Total resistance =4+2=6 Ω= 4 + 2 = 6\ \Omega
  4. I=126=2 AI = \dfrac{12}{6} = 2\text{ A}, so the answer is (b) 2.00 A2.00\text{ A}.
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Q203NEET 2005 · AIPMTEasy

P-N Junction Diode · Forward & reverse bias

Application of a forward bias to a p-n junction

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Answer: (d)

  1. Forward bias opposes the built-in potential, so the barrier height falls from V0V_0 to V0−VV_0 - V.
  2. The depletion zone narrows and the field across it, E≈(V0−V)/WE \approx (V_0 - V)/W, decreases.
  3. Doping (number of donors) is not changed by biasing.
  4. So the answer is (d).
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Q204NEET 2004 · AIPMTEasy

P-N Junction Diode · Forward & reverse bias

Of the diodes shown in the following diagrams, which one is reverse biased?

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Answer: (c)

  1. Reverse bias: cathode (bar side) at higher potential than anode (triangle side).
  2. (a) anode −5 V-5\text{ V}, cathode −12 V-12\text{ V}: forward. (b) anode 00, cathode −10 V-10\text{ V}: forward.
  3. (c) anode 00, cathode +5 V+5\text{ V}: cathode higher, so reverse biased.
  4. (d) anode +10 V+10\text{ V}, cathode +5 V+5\text{ V}: forward.
  5. So the answer is (c).
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Q205JEE Main 2004 · AIEEEEasy

P-N Junction Diode · Forward & reverse bias

When p-np\text{-}n junction diode is forward biased then

Show answer and solution

Answer: (a)

  1. Forward voltage VV opposes the built-in potential: barrier becomes V0−VV_0 - V (reduced).
  2. Majority carriers neutralise ions near the junction, so the depletion region also narrows.
  3. So the answer is (a).
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Q206JEE Main 2003 · AIEEEEasy

P-N Junction Diode · Depletion layer & barrier

In the middle of the depletion layer of a reverse- biased p-np\text{-}n junction, the

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Answer: (c)

  1. The depletion layer has positive ions on the n-side and negative ions on the p-side.
  2. The field grows from the edges and is strongest at the junction, i.e. the middle of the layer; reverse bias increases it further.
  3. So the answer is (c) electric field is maximum.
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Q207NEET 2003 · AIPMTEasy

P-N Junction Diode · Forward & reverse bias

Reverse bias applied to a junction diode

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Answer: (b)

  1. In reverse bias the applied voltage adds to the built-in potential: barrier becomes V0+VV_0 + V.
  2. Majority carrier flow is suppressed; the small minority current is nearly independent of voltage.
  3. So the answer is (b) raises the potential barrier.
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Q208NEET 2003 · AIPMTMedium

P-N Junction Diode · Depletion layer & barrier

Barrier potential of a p-n junction diode does not depened on

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Answer: (a)

  1. Barrier potential depends on doping density, temperature and the applied bias (forward bias reduces it).
  2. It does not depend on the physical design (shape/size) of the diode.
  3. So the answer is (a) diode design.
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Q209NEET 2002 · AIPMTMedium

P-N Junction Diode · Depletion layer & barrier

In a p-n junction

Show answer and solution

Answer: (b)

  1. At the junction, n side keeps positive donor ions and p side keeps negative acceptor ions.
  2. So the n side is at higher potential and the p side at lower potential.
  3. This matches option (a).
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Q210NEET 2002 · AIPMTMedium

P-N Junction Diode · Forward & reverse bias

For the given circuit of p-n junction diode which is correct

Figure

Show answer and solution

Answer: (a)

  1. In forward bias the (ideal) diode has nearly zero resistance, so the whole applied VV drops across RR.
  2. In reverse bias the diode is nearly open, so the voltage across RR is nearly zero.
  3. So the answer is (a).
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Q211NEET 2001 · AIPMTMedium

P-N Junction Diode · Diode circuits

The current in the circuit will be

Figure

Show answer and solution

Answer: (b)

  1. The battery sends current through the lower 20 Ω20\ \Omega to the left junction, then left to right through the branches.
  2. D1D_1 points left, so it is reverse biased and the top branch is open.
  3. D2D_2 points right, so it is forward biased and the 30 Ω30\ \Omega branch conducts.
  4. I=520+30=550I = \dfrac{5}{20 + 30} = \dfrac{5}{50} A
  5. So the answer is (b) 5/505/50 A.
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Q212NEET 2000 · AIPMTEasy

P-N Junction Diode · Forward & reverse bias

From the following diode circuit, which diode is in forward biased condition

Show answer and solution

Answer: (a)

  1. Forward bias: anode potential >> cathode potential.
  2. (a) 0>−2 V0 > -2\text{ V}: forward.
  3. (b) 0<2 V0 < 2\text{ V}, (c) −5 V<−2 V-5\text{ V} < -2\text{ V}, (d) 5 V<12 V5\text{ V} < 12\text{ V}: reverse.
  4. So the answer is (a).
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Q213NEET 1999 · AIPMTEasy

P-N Junction Diode · Depletion layer & barrier

Depletion layer consists of

Show answer and solution

Answer: (d)

  1. Mobile carriers near the junction diffuse across and recombine.
  2. Only the fixed donor and acceptor ions are left in that region.
  3. So the answer is (d) immobile ions.
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Q214NEET 1999 · AIPMTEasy

P-N Junction Diode · Forward & reverse bias

In forward bias the width of depletion layer in a p-np\text{-}n junction diode

Show answer and solution

Answer: (b)

  1. Forward bias lowers the barrier and pushes majority carriers into the junction region.
  2. Uncovered ions get neutralised, so the depletion layer width decreases.
  3. So the answer is (b).
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Q215NEET 1998 · AIPMTEasy

P-N Junction Diode · Depletion layer & barrier

The cause of the potential barrier in a p-np\text{-}n diode is

Show answer and solution

Answer: (d)

  1. Uncovered positive donor ions on the n-side and negative acceptor ions on the p-side collect near the junction.
  2. This charge layer produces the electric field and hence the potential barrier.
  3. So the answer is (d) concentration of positive and negative charges near the junction.
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Q216NEET 1998 · AIPMTEasy

P-N Junction Diode · Forward & reverse bias

A semi-conducting device is connected in a series in circuit with a battery and a resistance. A current is allowed to pass through the circuit. If the polarity of the battery is reversed, the current drops to almost zero. The device may be

Show answer and solution

Answer: (a)

  1. A pure or doped single semiconductor (pp, nn or intrinsic) conducts equally for both polarities.
  2. Only a p-np\text{-}n junction conducts in forward bias and gives almost zero current in reverse bias.
  3. So the answer is (a) a p-np\text{-}n junction.
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Q217NEET 1997 · AIPMTMedium

P-N Junction Diode · Diode circuits

The diode used in the circuit shown in the figure has a constant voltage drop at 0.5 V0.5\text{ V} at all currents and a maximum power rating of 100 milli watts. What should be the value of the resistor RR, connected in series with diode for obtaining maximum current?

Figure

Show answer and solution

Answer: (c)

  1. Maximum diode power P=VdIP = V_d I: Imax=100×10−30.5=0.2I_{max} = \dfrac{100\times 10^{-3}}{0.5} = 0.2 A
  2. Voltage across RR =1.5−0.5=1.0= 1.5 - 0.5 = 1.0 V
  3. R=1.00.2=5 ΩR = \dfrac{1.0}{0.2} = 5\ \Omega
  4. So the answer is (c) 5 Ω5\ \Omega.
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Q218NEET 1995 · AIPMTEasy

P-N Junction Diode · Forward & reverse bias

In the case of forward biasing of p-n junction, which one of the following figures correctly depicts the direction of flow of carriers?

Show answer and solution

Answer: (b)

  1. In forward bias, majority carriers move towards the junction.
  2. Holes in the p region move right (towards the junction); electrons in the n region move left (towards the junction).
  3. Figure (b) shows the p-side arrow pointing right and the n-side arrow pointing left.
  4. So the answer is (b).
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Q219NEET 1991 · AIPMTEasy

P-N Junction Diode · Depletion layer & barrier

The depletion layer in the p-n junction region is caused by

Show answer and solution

Answer: (b)

  1. Carriers diffuse across the junction due to the concentration difference and recombine.
  2. The region left with only immobile ions is the depletion layer.
  3. So the answer is (b) diffusion of charge carriers.
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Q220NEET 1988 · AIPMTEasy

P-N Junction Diode · Forward & reverse bias

p-n junction is said to be forward biased, when

Show answer and solution

Answer: (a)

  1. Forward bias: positive pole of battery to the p side, negative pole to the n side.
  2. This lowers the barrier and allows a large current.
  3. So the answer is (a).
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Q221MHT CET 2026 · 15 MAY · SHIFT 1Easy

Rectifiers & Filters · Half-wave & full-wave rectifiers

If an alternating voltage is applied across a diode in series with a load resistance then

Show answer and solution

Answer: (c)

  1. The diode conducts only in one half cycle, so current through the load flows in one direction only but varies with time.
  2. Such a unidirectional, varying voltage is a pulsating (d.c.) voltage.
  3. So the answer is (c).
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Q222MHT CET 2025 · 22 APR · SHIFT 1Easy

Rectifiers & Filters · Half-wave & full-wave rectifiers

If an alternating voltage is applied across a p-n junction diode in series with a load then

Show answer and solution

Answer: (b)

  1. The diode allows current in only one half cycle, so the load voltage is one-directional but not steady.
  2. This is a pulsating voltage. So the answer is (b).
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Q223MHT CET 2025 · 22 APR · SHIFT 1Medium

Rectifiers & Filters · Half-wave & full-wave rectifiers

If a centre tap transformer is used with two p-n junction diodes for full wave rectification then output voltage of rectifier with respect to each diode is (secondary voltage of transformer =Vs= \text{V}_\text{s})

Show answer and solution

Answer: (c)

  1. The centre tap splits the secondary into two equal halves.
  2. Each diode works with one half, so it gets Vs2\frac{V_s}{2}.
  3. So the answer is (c) (12)Vs\left(\frac{1}{2}\right)V_s.
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Q224NEET 2025Medium

Rectifiers & Filters · Half-wave & full-wave rectifiers

A full wave rectifier circuit with diodes (D1)(D_1) and (D2)(D_2) is shown in the figure. If input supply voltage V\text{V}in =220sin⁡(100πt)= 220\sin(100\pi t) volt, then at t=15 msect = 15\text{ msec}

Figure

Show answer and solution

Answer: (d)

  1. ω=100π⇒T=2πω=20\omega = 100\pi \Rightarrow T = \frac{2\pi}{\omega} = 20 ms.
  2. At t=15t = 15 ms: Vin=220sin⁡(1.5π)=−220V_{in} = 220 \sin(1.5\pi) = -220 V, the negative half cycle.
  3. Now the top end of the secondary (to D1D_1) is negative and the bottom end (to D2D_2) is positive relative to the centre tap.
  4. So D1D_1 is reverse biased and D2D_2 is forward biased. Answer (d).
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Q225JEE Main 2025 · 28 JAN · SHIFT 2Medium

Rectifiers & Filters · Half-wave & full-wave rectifiers

Figure

In the circuit shown here, assuming threshold voltage of diode is negligibly small, then voltage VABV_{AB} is correctly represented by:

Figure

Figure

Figure

Show answer and solution

Answer: (b)

  1. The diode's anode is at the source's lower terminal and its cathode at B, so current flows only when the lower terminal is positive, i.e. when V<0V < 0.
  2. Then current goes from B to A through RR, so VAB=VV_{AB} = V (negative).
  3. When V>0V > 0 the diode blocks, no current flows, and VAB=0V_{AB} = 0.
  4. So VABV_{AB} shows only the negative half cycles: answer (b).
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Q226MHT CET 2024 · 15 MAY · SHIFT 2Easy

Rectifiers & Filters · Half-wave & full-wave rectifiers

A p-n junction diode as a rectifier converts

Show answer and solution

Answer: (a)

  1. A diode conducts in one direction only, so it lets through only one polarity of an alternating input.
  2. Hence a rectifier converts a.c. to d.c. So the answer is (a).
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Q227MHT CET 2024 · 10 MAY · SHIFT 1Easy

Rectifiers & Filters · Filter & power supply

In the block diagram of simple rectifier circuit, from a variable a.c. voltage, constant d.c. voltage is obtained. The correct order of operation is

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Answer: (c)

  1. First the diode rectifier turns a.c. into pulsating d.c.
  2. Then the filter removes the a.c. ripple.
  3. Finally the voltage regulator keeps the d.c. output constant.
  4. So the answer is (c) diode rectifier, filter, voltage regulator.
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Q228MHT CET 2023 · 13 MAY · SHIFT 2Easy

Rectifiers & Filters · Half-wave & full-wave rectifiers

If the maximum efficiency of a full wave rectifier is x%x\% and that of half-wave rectifier is y%y\%, then the relation between xx and yy is

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Answer: (b)

  1. Maximum efficiency: half-wave η=40.6%\eta = 40.6\%, full-wave η=81.2%\eta = 81.2\%.
  2. x=81.2=2×40.6=2yx = 81.2 = 2 \times 40.6 = 2y.
  3. So the answer is (b) x=2yx = 2y.
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Q229MHT CET 2023 · 9 MAY · SHIFT 2Easy

Rectifiers & Filters · Half-wave & full-wave rectifiers

If the frequency of the input voltage is 50 Hz50\text{ Hz}, applied to a (a) half wave rectifier and (b) full wave rectifier. The output frequency in both cases is respectively

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Answer: (b)

  1. Half-wave rectifier gives one pulse per cycle: output frequency =f=50= f = 50 Hz.
  2. Full-wave rectifier gives two pulses per cycle: output frequency =2f=100= 2f = 100 Hz.
  3. So the answer is (b) 50 Hz, 100 Hz.
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Q230NEET 2023Easy

Rectifiers & Filters · Filter & power supply

A full wave rectifier circuit consists of two p-n junction diodes, a centre-tapped transformer, capacitor and a load resistance. Which of these components remove the ac ripple from the rectified output?

Show answer and solution

Answer: (b)

  1. A capacitor in parallel with the load charges near the peaks and discharges slowly between them, smoothing the output.
  2. So the capacitor removes the a.c. ripple. Answer (b).
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Q231NEET 2022 · PHASE 1Easy

Rectifiers & Filters · Half-wave & full-wave rectifiers

In half wave rectification, if the input frequency is 60 Hz, then the output frequency would be

Show answer and solution

Answer: (c)

  1. A half-wave rectifier gives one pulse per input cycle.
  2. Output frequency == input frequency =60= 60 Hz. So the answer is (c).
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Q232MHT CET 2021 · 24 SEP · SHIFT 2Easy

Rectifiers & Filters · Half-wave & full-wave rectifiers

The input a.c. voltage of frequency 60 Hz60\text{ Hz} is applied to half-wave rectifier and also to full-wave rectifier. The output frequency in case of half-wave rectifier and that in case of full wave rectifier is respectively.

Show answer and solution

Answer: (b)

  1. Half-wave: output frequency =f=60= f = 60 Hz.
  2. Full-wave: output frequency =2f=120= 2f = 120 Hz.
  3. So the answer is (b) 60 Hz, 120 Hz.
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Q233MHT CET 2021 · 20 SEP · SHIFT 2Easy

Rectifiers & Filters · Half-wave & full-wave rectifiers

A rectifier is used to

Show answer and solution

Answer: (a)

  1. A rectifier passes current in one direction only, turning alternating voltage into unidirectional voltage.
  2. So it converts a.c. to d.c. Answer (a).
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Q234MHT CET 2021 · 20 SEP · SHIFT 1Easy

Rectifiers & Filters · Half-wave & full-wave rectifiers

The frequency of a given a.c. signal is 'N' Hz. When it is connected to a half wave rectifier, the number of output pulses given by the rectifier in 1 second is

Show answer and solution

Answer: (c)

  1. A half-wave rectifier passes only one half of each cycle, giving one output pulse per cycle.
  2. In 1 s there are NN cycles, so there are NN pulses.
  3. So the answer is (c) N.
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Q235JEE Main 2021 · 31 AUG · SHIFT 1Medium

Rectifiers & Filters · Half-wave & full-wave rectifiers

Choose the correct waveform that can represent the voltage across R of the following circuit, assuming the diode is ideal one:

Figure

Show answer and solution

Answer: (d)

  1. The 3 V battery opposes the source in the loop, so the diode conducts only when Vi>3V_i > 3 V.
  2. While it conducts, VR=Vi−3V_R = V_i - 3. When Vi<3V_i < 3 V there is no current and VR=0V_R = 0.
  3. So the voltage across RR is the part of the sine wave above the +3+3 V line, as in (a).
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Q236JEE Main 2021 · 31 AUG · SHIFT 2Medium

Rectifiers & Filters · Filter & power supply

Statement - I:

To get a steady dc output from the pulsating voltage received from a full wave rectifier we can connect a capacitor across the output parallel to the load RL.

Statement - II:

To get a steady dc output from the pulsating voltage received from a full wave rectifier we can connect an inductor in series with RL.

In the light of the above statements, choose the most appropriate answer from the options given below:

Show answer and solution

Answer: (d)

  1. Statement I: a capacitor in parallel with RLR_L charges at the peaks and supplies the load between them, so it smooths the output. True.
  2. Statement II: an inductor in series with RLR_L opposes changes in current, so it also smooths the output. True.
  3. So the answer is (d) both statements are true.
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Q237JEE Main 2009 · AIEEEEasy

Rectifiers & Filters · Half-wave & full-wave rectifiers

A p-np\text{-}n junction (D)(D) shown in the figure can act as a rectifier. An alternating current source (V)(V) is connected in the circuit.

Figure

The current (I)(I) in the resistor (R)(R) can be shown by:

Show answer and solution

Answer: (b)

  1. Single diode in series with RR: it is a half-wave rectifier.
  2. Current flows only during the half cycle that forward biases DD, and is zero in the other half.
  3. So II shows one positive half-sine, then a gap of equal length, and so on. So the answer is (b).
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Q238JEE Main 2005 · AIEEEEasy

Rectifiers & Filters · Half-wave & full-wave rectifiers

In a full wave rectifier circuit operating from 50 Hz50\,Hz mains frequency, the fundamental frequency in the ripple would be

Show answer and solution

Answer: (d)

  1. A full-wave rectifier gives two output pulses per input cycle.
  2. Ripple frequency =2×50=100= 2 \times 50 = 100 Hz. So the answer is (d).
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Q239NEET 2004 · AIPMTMedium

Rectifiers & Filters · Filter & power supply

The peak voltage in the output of a half wave diode rectifier fed with a sinusoidal signal without filter is 10 V. The d.c. component of the output voltage is

Show answer and solution

Answer: (b)

  1. For a half-wave rectifier, Vdc=VmπV_{dc} = \frac{V_m}{\pi}.
  2. Vdc=10πV_{dc} = \frac{10}{\pi} V. So the answer is (b).
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Q240NEET 2003 · AIPMTEasy

Rectifiers & Filters · Half-wave & full-wave rectifiers

If a full wave rectifier circuit is operating from 50 Hz mains, the fundamental frequency in the ripple will be

Show answer and solution

Answer: (d)

  1. A full-wave rectifier gives two pulses per input cycle.
  2. Ripple frequency =2f=2×50=100= 2f = 2 \times 50 = 100 Hz. So the answer is (d).
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Q241MHT CET 2026 · 19 MAY · SHIFT 2Easy

Special Purpose Diodes · Zener basics

To use Zener diode of maximum power rating 1.01.0 W as a 4.04.0 V stabilized power supply, the maximum current flowing through Zener diode will

Show answer and solution

Answer: (c)

  1. Zener power P=VZImaxP = V_Z I_{max}, so Imax=PVZI_{max} = \dfrac{P}{V_Z}.
  2. Imax=1.04.0=0.25 A=250 mAI_{max} = \dfrac{1.0}{4.0} = 0.25\ \text{A} = 250\ \text{mA}
  3. So the answer is (c) 250250 mA.
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Q242MHT CET 2026 · 17 APR · SHIFT 1Easy

Special Purpose Diodes · Zener basics

When the Zener diode is used as a voltage regulator, it is connected in

Show answer and solution

Answer: (d)

  1. A Zener regulates only in the reverse breakdown region, so it is reverse biased.
  2. The load must get the same constant voltage VZV_Z, so the Zener is placed in parallel with the load (a series resistor drops the extra voltage).
  3. So the answer is (d) reverse bias and in parallel with load.
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Q243MHT CET 2026 · 13 APR · SHIFT 2Easy

Special Purpose Diodes · Zener basics

Choose the correct statement about Zener diode:

Show answer and solution

Answer: (a)

  1. In reverse bias, at breakdown the voltage stays fixed at VZV_Z over a wide range of current, so it regulates voltage.
  2. In forward bias it conducts like an ordinary p-n junction diode.
  3. So the answer is (a).
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Q244MHT CET 2026 · 12 MAY · SHIFT 1Easy

Special Purpose Diodes · LED

A LED emits visible light when its

Show answer and solution

Answer: (b)

  1. In a forward-biased LED, electrons from the n side and holes from the p side meet at the junction.
  2. When they recombine, energy about equal to EgE_g is released as a photon.
  3. So the answer is (b) holes and electrons recombine.
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Q245MHT CET 2026 · 18 APR · SHIFT 1Easy

Special Purpose Diodes · LED

Which one of the following statements is 'WRONG' regarding LED?

Show answer and solution

Answer: (d)

  1. LEDs have a long life, are energy efficient and their colours do not fade: (a), (b), (c) are true.
  2. Brightness depends on the forward current, so it can be controlled by changing the current.
  3. So the wrong statement is (d).
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Q246MHT CET 2026 · 16 APR · SHIFT 2Easy

Special Purpose Diodes · LED

Which of the following statement is NOT correct in the case of LED?

(A) It is a heavily doped p-n junction diode.

(B) It emits light only when it is forward biased.

(C) It emits light only when it is reverse biased.

(D) The energy of the light emitted is equal to or slightly less than the energy gap of the semiconductor used.

Show answer and solution

Answer: (c)

  1. (A) True: an LED is a heavily doped p-n junction.
  2. (B) True: light comes from recombination, which happens only in forward bias.
  3. (C) False: in reverse bias there is no recombination, so no light.
  4. (D) True: photon energy hν≤Egh\nu \le E_g.
  5. So the answer is (c) C.
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Q247MHT CET 2026 · 15 APR · SHIFT 1Easy

Special Purpose Diodes · Photodiode

Photodiode is a device

Show answer and solution

Answer: (d)

  1. A photodiode is operated in reverse bias, where the small dark current changes greatly with light.
  2. Photocurrent depends on the intensity of incident light, nearly independent of the reverse voltage.
  3. So (a), (b), (c) are wrong; the answer is (d) always operated in reverse bias.
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Q248MHT CET 2026 · 19 APR · SHIFT 1Easy

Special Purpose Diodes · Solar cell & device identification

The material used for solar cell should have band gap

(A) equal to zero.

(B) equal to 0.080.08 eV.

(C) between 1.01.0 eV to 1.81.8 eV.

(D) equal to 22 eV.

Show answer and solution

Answer: (c)

  1. Most solar radiation has photon energy around 1.51.5 eV.
  2. Too small a gap wastes energy as heat; too large a gap absorbs few photons.
  3. So the band gap should be between 1.01.0 eV and 1.81.8 eV, statement C.
  4. So the answer is (c) C.
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Q249MHT CET 2026 · 19 MAY · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

In the following circuit, the current through the Zener diode is

Figure

Show answer and solution

Answer: (b)

  1. Zener holds the node at 99 V, so R1R_1 has 18−9=918 - 9 = 9 V across it.
  2. I=9800=11.25I = \frac{9}{800} = 11.25 mA
  3. Current in R2R_2: I2=91800=5I_2 = \frac{9}{1800} = 5 mA
  4. IZ=I−I2=11.25−5=6.25I_Z = I - I_2 = 11.25 - 5 = 6.25 mA
  5. So the answer is (b) 6.256.25 mA.
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Q250MHT CET 2026 · 15 MAY · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

The Zener diode has reverse breakdown voltage VZV_Z. The current through the load resistance RLR_L is ILI_L. The current through Zener diode is

(V0V_0 = Input voltage, RSR_S = Series resistance)

Show answer and solution

Answer: (d)

  1. Output is held at VZV_Z, so the drop across RSR_S is V0−VZV_0 - V_Z.
  2. Current through RSR_S: I=V0−VZRSI = \frac{V_0 - V_Z}{R_S}
  3. This splits into Zener and load: I=IZ+ILI = I_Z + I_L
  4. IZ=V0−VZRS−ILI_Z = \frac{V_0 - V_Z}{R_S} - I_L, so the answer is (d).
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Q251NEET 2026 · RE-NEETMedium

Special Purpose Diodes · Zener regulator circuits

An ideal Zener diode with breakdown voltage of -3 V is reverse biased with a negative input voltage Vi=−5 VV_i = -5\text{ V}. The magnitude of voltage difference between point BB and AA is:

Figure

Show answer and solution

Answer: (c)

  1. The Zener is reverse biased with ∣Vi∣=5|V_i| = 5 V greater than 33 V, so it breaks down and holds 33 V across itself (B to C).
  2. The rest of the supply drops across RR, which lies between B and A.
  3. ∣VB−VA∣=5−3=2|V_B - V_A| = 5 - 3 = 2 V
  4. So the answer is (c) 22 V.
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Q252JEE Main 2026 · 23 JAN · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

The following diagram shows a Zener diode as a voltage regulator. The Zener diode is rated at Vz=5 VV_z = 5\text{ V} and the desired current in load is 5 mA. The unregulated voltage source can supply upto 25 V. Considering the Zener diode can withstand four times of the load current, the value of resistor RsR_s (shown in circuit) should be ‾ Ω\underline{\qquad\quad}\ \Omega.

Figure

Show answer and solution

Answer: (c)

  1. Worst case is the maximum input 2525 V, giving drop 25−5=2025 - 5 = 20 V across RsR_s.
  2. Safe current limit: 4IL=4×5=204 I_L = 4 \times 5 = 20 mA, taken as the current through RsR_s.
  3. Rs=2020×10−3=1000 ΩR_s = \frac{20}{20 \times 10^{-3}} = 1000\ \Omega
  4. So the answer is (c) 1000 Ω1000\ \Omega.
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Q253JEE Main 2026 · 4 APR · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

A diode has Zener voltage of 10 V and maximum power dissipation of 0.5 W, then the minimum resistance to be used in series with this diode for safety when it is connected to a 25 V power supply is ‾ Ω\underline{\qquad\quad}\ \Omega.

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 300

  1. Maximum Zener current: I=PVZ=0.510=0.05I = \frac{P}{V_Z} = \frac{0.5}{10} = 0.05 A
  2. Drop across series resistor: 25−10=1525 - 10 = 15 V
  3. Rmin=150.05=300 ΩR_{min} = \frac{15}{0.05} = 300\ \Omega
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Q254JEE Main 2026 · 24 JAN · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

A voltage regulating circuit consisting of Zener diode, having break-down voltage of 10 V and maximum power dissipation of 0.4 W, is operated at 15 V. The approximate value of protective resistance in this circuit is ‾ Ω\underline{\qquad\quad}\,\Omega.

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 125

  1. Maximum Zener current: I=PVZ=0.410=0.04I = \frac{P}{V_Z} = \frac{0.4}{10} = 0.04 A
  2. Drop across protective resistor: 15−10=515 - 10 = 5 V
  3. R=50.04=125 ΩR = \frac{5}{0.04} = 125\ \Omega
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Q255JEE Main 2026 · 6 APR · SHIFT 1Medium

Special Purpose Diodes · LED

The maximum rated power of the LED is 2 mW and it is used in the circuit with input voltage of 5 V as shown in the figure below. The current through resistance RSR_S is 0.5 mA.

The minimum value of the resistance of RSR_S, to ensure that the LED is not damaged is ‾ kΩ\underline{\qquad\quad}\ \text{k}\Omega.

Figure

Show answer and solution

Answer: (b)

  1. The diode in series with R=1 kΩR = 1\text{ k}\Omega is reverse biased, so that branch carries no current; all 0.50.5 mA flows through the LED.
  2. Largest allowed LED voltage: VLED=PI=2 mW0.5 mA=4V_{LED} = \frac{P}{I} = \frac{2\text{ mW}}{0.5\text{ mA}} = 4 V
  3. Drop across RSR_S must be at least 5−4=15 - 4 = 1 V.
  4. RS,min=10.5×10−3=2 kΩR_{S,min} = \frac{1}{0.5 \times 10^{-3}} = 2\text{ k}\Omega, so the answer is (b) 22.
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Q256MHT CET 2025 · 22 APR · SHIFT 2Easy

Special Purpose Diodes · Zener basics

The graph given below represents I-V characteristics of zener diode. The part of the characteristics curve that is most relevant for its operation as a voltage regulator is

Figure

Show answer and solution

Answer: (d)

  1. Voltage regulation uses the reverse breakdown region, where current rises sharply while voltage stays nearly constant.
  2. In the graph this is the steep part in the reverse-bias quadrant, from d to e.
  3. So the answer is (d) de.
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Q257MHT CET 2025 · 5 MAY · SHIFT 2Easy

Special Purpose Diodes · LED

When LED is manufactured by using aluminium gallium arsenide (AlGaAs), it emits

Show answer and solution

Answer: (b)

  1. The colour of an LED depends on the band gap of its material.
  2. AlGaAs has a band gap of about 1.41.4 to 1.61.6 eV, giving λ≈800\lambda \approx 800 to 880880 nm.
  3. This is beyond the red end, i.e. infrared.
  4. So the answer is (b) infra red radiation.
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Q258MHT CET 2025 · 23 APR · SHIFT 2Easy

Special Purpose Diodes · LED

I−V\text{I} - \text{V} characteristics of LED is shown correctly by graph

Figure

Show answer and solution

Answer: (b)

  1. An LED works only in forward bias, so its graph is drawn in the first quadrant.
  2. Current is almost zero until the threshold voltage, then rises sharply (exponentially).
  3. Graph (b) shows this shape; graph (a) includes a breakdown branch, (c) is a solar cell, (d) saturates.
  4. So the answer is (b).
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Q259MHT CET 2025 · 23 APR · SHIFT 2Easy

Special Purpose Diodes · Photodiode

I - V characteristics of photodiode for different illumination intensities I1,I2,I3\text{I}_1, \text{I}_2, \text{I}_3 and I4\text{I}_4 are drawn as follows. Then the maximum intensity among them is

Figure

Show answer and solution

Answer: (d)

  1. In reverse bias, photocurrent is proportional to the light intensity.
  2. Curve I4I_4 shows the largest reverse current.
  3. So the answer is (d) I4I_4.
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Q260MHT CET 2025 · 26 APR · SHIFT 1Easy

Special Purpose Diodes · Solar cell & device identification

The material used for solar cell should have band gap

Show answer and solution

Answer: (d)

  1. Maximum solar intensity is near photon energy ≈1.5\approx 1.5 eV.
  2. A band gap of 1.01.0 to 1.81.8 eV absorbs most of these photons with little waste.
  3. So the answer is (d) between 1.0 eV and 1.8 eV.
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Q261JEE Main 2025 · 7 APR · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

In the following circuit, the reading of the ammeter will be

(( Take Zener breakdown voltage =4 V)= 4\text{ V})

Figure

Show answer and solution

Answer: (c)

  1. Check the Zener: without it, the 400 Ω400\ \Omega branch would get 12×400500=9.612 \times \frac{400}{500} = 9.6 V >4> 4 V, so it breaks down.
  2. Voltage across the load branch is held at 44 V.
  3. Ammeter reading: I=4400=10I = \frac{4}{400} = 10 mA
  4. So the answer is (c) 1010 mA.
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Q262JEE Main 2025 · 2 APR · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

A zener diode with 5 V zener voltage is used to regulate an unregulated dc voltage input of 25 V. For a 400 Ω400\,\Omega resistor connected in series, the zener current is found to be 4 times load current. The load current (IL)(I_L) and load resistance (RL)(R_L) are:

Show answer and solution

Answer: (c)

  1. Current through series resistor: I=25−5400=50I = \frac{25 - 5}{400} = 50 mA
  2. I=IZ+IL=4IL+IL=5IL⇒IL=10I = I_Z + I_L = 4I_L + I_L = 5I_L \Rightarrow I_L = 10 mA
  3. RL=510×10−3=500 ΩR_L = \frac{5}{10 \times 10^{-3}} = 500\ \Omega
  4. So the answer is (c) IL=10I_L = 10 mA, RL=500 ΩR_L = 500\ \Omega.
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Q263JEE Main 2025 · 24 JAN · SHIFT 1Medium

Special Purpose Diodes · LED

Consider the following statements:

A. The junction area of solar cell is made very narrow compared to a photo diode. B. Solar cells are not connected with any external bias.

C. LED is made of lightly doped p-n junction.

D. Increase of forward current results in continuous increase of LED light intensity. E. LEDs have to be connected in forward bias for emission of light.

Choose the correct answer from the options given below:

Show answer and solution

Answer: (b)

  1. A: false; a solar cell has a large junction area to collect more light.
  2. B: true; a solar cell generates its own emf, no external bias.
  3. C: false; an LED is heavily doped.
  4. D: false; intensity rises with current only up to a point, then falls.
  5. E: true; LEDs emit only under forward bias.
  6. So the answer is (b) B, E only.
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Q264JEE Main 2024 · 9 APR · SHIFT 1Easy

Special Purpose Diodes · LED

A light emitting diode (LED) is fabricated using GaAs semiconducting material whose band gap is 1.42 eV1.42\text{ eV}. The wavelength of light emitted from the LED is:

Show answer and solution

Answer: (b)

  1. λ=hcEg\lambda = \dfrac{hc}{E_g}, with hc≈1240hc \approx 1240 eV nm.
  2. λ=12401.42 nm≈873 nm\lambda = \dfrac{1240}{1.42}\ \text{nm} \approx 873\ \text{nm}
  3. So the answer is (b) 875875 nm.
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Q265MHT CET 2024 · 15 MAY · SHIFT 2Easy

Special Purpose Diodes · Photodiode

For detecting light intensity we use

Show answer and solution

Answer: (a)

  1. In reverse bias the dark current is tiny, so the fractional change in current due to light is large.
  2. This makes a reverse-biased photodiode a sensitive light detector.
  3. So the answer is (a) photodiode in reverse bias.
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Q266MHT CET 2024 · 9 MAY · SHIFT 2Easy

Special Purpose Diodes · Photodiode

In the working of photodiode, the reverse current depends on

Show answer and solution

Answer: (b)

  1. Light creates electron-hole pairs near the junction, raising minority carrier concentration.
  2. Reverse current is carried by minority carriers, so it depends on their concentration.
  3. So the answer is (b) concentration of minority carriers.
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Q267JEE Main 2024 · 1 FEB · SHIFT 2Easy

Special Purpose Diodes · Photodiode

Conductivity of a photodiode starts changing only if the wavelength of incident light is less than 660 nm660\text{ nm}. The band gap of photodiode is found to be (X8)eV\left(\frac{\text{X}}{8}\right)\text{eV}. The value of X\text{X} is:

(Given, h=6.6×10−34 Js,e=1.6×10−19 C\text{h} = 6.6 \times 10^{-34}\text{ Js}, \text{e} = 1.6 \times 10^{-19}\text{ C})

Show answer and solution

Answer: (c)

  1. Cut-off wavelength gives Eg=hcλE_g = \dfrac{hc}{\lambda}.
  2. Eg=6.6×10−34×3×108660×10−9=3×10−19E_g = \dfrac{6.6\times10^{-34}\times3\times10^{8}}{660\times10^{-9}} = 3\times10^{-19} J
  3. Eg=3×10−191.6×10−19=1.875 eV=158E_g = \dfrac{3\times10^{-19}}{1.6\times10^{-19}} = 1.875\ \text{eV} = \dfrac{15}{8} eV
  4. So X=15X = 15, answer (c).
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Q268NEET 2024Easy

Special Purpose Diodes · Solar cell & device identification

Figure

The I-V characteristics shown above are exhibited by a

Show answer and solution

Answer: (d)

  1. A solar cell gives current without any applied bias; its I-V curve is drawn in the fourth quadrant (V positive, I negative).
  2. Here the axes are swapped (V vertical, I horizontal), so the same curve appears with V positive and I negative.
  3. So the answer is (d) Solar cell.
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Q269JEE Main 2024 · 9 APR · SHIFT 2Easy

Special Purpose Diodes · Solar cell & device identification

The I-VI\text{-}V characteristics of an electronic device are shown in the figure. The device is:

Figure

Show answer and solution

Answer: (d)

  1. The curve conducts in forward bias and shows a sharp reverse breakdown where the voltage stays almost constant.
  2. Constant voltage over a large current range at breakdown is the Zener property.
  3. So the answer is (d) a zener diode used as a voltage regulator.
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Q270MHT CET 2024 · 10 MAY · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

In the given circuit, Zener breakdown voltage is 8 V. If power of Zener diode is 1.6 W. The value of RR is

Figure

Show answer and solution

Answer: (d)

  1. Maximum Zener current: IZ=PVZ=1.68=0.2I_Z = \frac{P}{V_Z} = \frac{1.6}{8} = 0.2 A
  2. Drop across RR: 10−8=210 - 8 = 2 V (no load, so all of it flows through the Zener).
  3. R=20.2=10 ΩR = \frac{2}{0.2} = 10\ \Omega
  4. So the answer is (d) 10 Ω10\ \Omega.
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Q271MHT CET 2024 · 4 MAY · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

In the circuit diagram shown in figure, the current through the zener diode is

Figure

Show answer and solution

Answer: (b)

  1. Output held at 1515 V, so drop across RSR_S is 24−15=924 - 15 = 9 V.
  2. I=9300=30I = \frac{9}{300} = 30 mA
  3. IL=151200=12.5I_L = \frac{15}{1200} = 12.5 mA
  4. IZ=30−12.5=17.5I_Z = 30 - 12.5 = 17.5 mA, so the answer is (b).
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Q272MHT CET 2024 · 4 MAY · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

A zener diode, having breakdown voltage 15 V is used in a voltage regulator circuit as shown. The current through the zener diode is

Figure

Show answer and solution

Answer: (b)

  1. Output held at 1515 V, so drop across 250 Ω250\ \Omega is 20−15=520 - 15 = 5 V.
  2. I=5250=20I = \frac{5}{250} = 20 mA
  3. IL=151000=15I_L = \frac{15}{1000} = 15 mA
  4. IZ=20−15=5I_Z = 20 - 15 = 5 mA, so the answer is (b).
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Q273JEE Main 2024 · 1 FEB · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

In the given circuit if the power rating of Zener diode is 10 mW10\text{ mW}, the value of series resistance RsR_s to regulate the input unregulated supply is:

Figure

Show answer and solution

Answer: (d)

  1. Maximum Zener current: IZ,max=10 mW5 V=2I_{Z,max} = \frac{10\text{ mW}}{5\text{ V}} = 2 mA; load current IL=51 kΩ=5I_L = \frac{5}{1\text{ k}\Omega} = 5 mA.
  2. Drop across RsR_s: 8−5=38 - 5 = 3 V, and Is=IZ+ILI_s = I_Z + I_L must lie between 55 mA and 77 mA.
  3. Rs=3IsR_s = \frac{3}{I_s}: from 37\frac{3}{7} kΩ\Omega (at 77 mA) to 35\frac{3}{5} kΩ\Omega (at 55 mA).
  4. So the answer is (d) 37 kΩ<Rs<35 kΩ\frac{3}{7}\text{ k}\Omega < R_s < \frac{3}{5}\text{ k}\Omega.
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Q274JEE Main 2024 · 30 JAN · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

A Zener diode of breakdown voltage 10 V10\text{ V} is used as a voltage regulator as shown in the figure. The current through the Zener diode is:

Figure

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Answer: (b)

  1. Without the Zener the load would get 20×500700≈14.320 \times \frac{500}{700} \approx 14.3 V >10> 10 V, so the Zener conducts and holds 1010 V.
  2. I=20−10200=50I = \frac{20 - 10}{200} = 50 mA
  3. IL=10500=20I_L = \frac{10}{500} = 20 mA
  4. IZ=50−20=30I_Z = 50 - 20 = 30 mA, so the answer is (b).
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Q275JEE Main 2024 · 29 JAN · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

In the given circuit, the breakdown voltage of the Zener diode is 3.0 V3.0\text{ V}. What is the value of Iz\text{I}_\text{z}?

Figure

Show answer and solution

Answer: (c)

  1. Without the Zener the load would get 10×23≈6.710 \times \frac{2}{3} \approx 6.7 V >3> 3 V, so the Zener holds 33 V.
  2. I=10−31 kΩ=7I = \frac{10 - 3}{1\text{ k}\Omega} = 7 mA
  3. IL=32 kΩ=1.5I_L = \frac{3}{2\text{ k}\Omega} = 1.5 mA
  4. IZ=7−1.5=5.5I_Z = 7 - 1.5 = 5.5 mA, so the answer is (c).
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Q276NEET 2024Medium

Special Purpose Diodes · Solar cell & device identification

Consider the following statements A and B and identify the correct answer:

Figure

A. For a solar-cell, the I-V characteristics lies in the IV quadrant of the given graph. B. In a reverse biased pnpn junction diode, the current measured in (μA)(\mu\text{A}), is due to majority charge carriers.

Show answer and solution

Answer: (a)

  1. A: a solar cell gives power, so V>0V > 0 while current flows opposite to forward current (I<0I < 0). Its curve lies in quadrant IV. A is correct.
  2. B: the small reverse current (μ\muA) is due to minority carriers, not majority carriers. B is incorrect.
  3. So the answer is (a) A is correct but B is incorrect.
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Q277JEE Main 2024 · 8 APR · SHIFT 2Difficult

Special Purpose Diodes · Zener regulator circuits

A potential divider circuit is connected with a dc source of 20 V20\text{ V}, a light emitting diode of glow in voltage 1.8 V1.8\text{ V} and a zener diode of breakdown voltage of 3.2 V3.2\text{ V}. The length (PR) of the resistive wire is 20 cm20\text{ cm}. The minimum length of PQ to just glow the LED is _________ cm\text{cm}.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 5

  1. The LED is forward biased and the Zener is reverse biased in series between P and Q.
  2. To make the LED glow: VPQ≥1.8+3.2=5V_{PQ} \geq 1.8 + 3.2 = 5 V.
  3. Along the uniform wire, potential drop per cm =20 V20 cm=1= \dfrac{20\text{ V}}{20\text{ cm}} = 1 V/cm.
  4. PQmin=5 V1 V/cm=5PQ_{min} = \dfrac{5\text{ V}}{1\text{ V/cm}} = 5 cm
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Q278JEE Main 2023 · 1 FEB · SHIFT 2Easy

Special Purpose Diodes · Zener basics

Choose the correct statement about Zener diode:

Show answer and solution

Answer: (a)

  1. In reverse bias, at breakdown the voltage stays fixed at VZV_Z, so it regulates voltage.
  2. In forward bias it conducts like a normal p-n junction diode.
  3. So the answer is (a).
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Q279MHT CET 2023 · 14 MAY · SHIFT 1Easy

Special Purpose Diodes · LED

For emission of light, a light emitting diode (LED) is

Show answer and solution

Answer: (d)

  1. Light is produced by electron-hole recombination at the junction.
  2. Carriers are injected across the junction only in forward bias.
  3. So the answer is (d) always used in forward biased condition.
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Q280MHT CET 2023 · 12 MAY · SHIFT 2Easy

Special Purpose Diodes · LED

Which one of the following statements is WRONG regarding LED?

Show answer and solution

Answer: (c)

  1. LEDs are energy efficient, long lasting and their colours do not fade: (a), (b), (d) are true.
  2. Brightness can be controlled by changing the forward current.
  3. So the wrong statement is (c).
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Q281JEE Main 2023 · 29 JAN · SHIFT 1Easy

Special Purpose Diodes · LED

Which one of the following statement is not correct in the case of light emitting diodes? A. It is a heavily doped p-n junction.

B. It emits light only when it is forward biased.

C. It emits light only when it is reverse biased.

D. The energy of the light emitted is equal to or slightly less than the energy gap of the semiconductor used.

Choose the correct answer from the options given below:

Show answer and solution

Answer: (d)

  1. A: True, an LED is a heavily doped p-n junction.
  2. B: True, it emits light only in forward bias.
  3. C: False, no recombination and no light in reverse bias.
  4. D: True, photon energy is equal to or slightly less than EgE_g.
  5. So the answer is (d) C.
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Q282MHT CET 2023 · 10 MAY · SHIFT 1Easy

Special Purpose Diodes · Solar cell & device identification

Identify the mismatch out of the following.

Show answer and solution

Answer: (c)

  1. Zener diode: voltage regulator (correct). Photodiode: optocouplers (correct). LED: optical communication (correct).
  2. A solar cell converts light energy into electrical energy, not electrical energy into light.
  3. So the mismatch is (c).
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Q283NEET 2023Easy

Special Purpose Diodes · Solar cell & device identification

Given below are two statements:

Statement I: Photovoltaic devices can convert optical radiation into electricity.

Statement II: Zener diode is designed to operate under reverse bias in breakdown region. In the light of the above statements, choose the most appropriate answer from the options given below:

Show answer and solution

Answer: (d)

  1. Statement I: Correct, photovoltaic devices (solar cells) convert light into electricity.
  2. Statement II: Correct, a Zener diode is designed to work in reverse breakdown.
  3. So the answer is (d) both statements are correct.
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Q284MHT CET 2023 · 9 MAY · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

A 5.0 V5.0\text{ V} stabilized power supply is required to be designed using a 12 V12\text{ V} DC power supply as input source. The maximum power rating of zener diode is 2.0 W2.0\text{ W}. The minimum value of resistance RsR_\text{s} in Ω\Omega connected in series with zener diode will be

Show answer and solution

Answer: (b)

  1. Maximum Zener current: IZ,max=PVZ=2.05.0=0.4I_{Z,max} = \frac{P}{V_Z} = \frac{2.0}{5.0} = 0.4 A
  2. Drop across RsR_s: 12−5=712 - 5 = 7 V
  3. Rs,min=70.4=17.5 ΩR_{s,min} = \frac{7}{0.4} = 17.5\ \Omega
  4. So the answer is (b) 17.517.5.
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Q285JEE Main 2023 · 10 APR · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

A zener diode of power rating 1.6 W is to be used as voltage regulator. If the zener diode has a breakdown of 8V and it has to regulate voltage fluctuating between 3 V and 10 V. The value of resistance Rs for safe operation of diode will be

Figure

Show answer and solution

Answer: (c)

  1. Maximum safe Zener current: IZ,max=PVZ=1.68=0.2I_{Z,max} = \frac{P}{V_Z} = \frac{1.6}{8} = 0.2 A
  2. Worst case is the highest input 1010 V: drop across Rs=10−8=2R_s = 10 - 8 = 2 V.
  3. Rs=20.2=10 ΩR_s = \frac{2}{0.2} = 10\ \Omega
  4. So the answer is (c) 10 Ω10\ \Omega.
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Q286JEE Main 2023 · 25 JAN · SHIFT 1Medium

Special Purpose Diodes · Photodiode

Given below are two statements: one is labelled as Assertion A and the other is labelled as Reason R

Assertion A: Photodiodes are used in forward bias usually for measuring the light intensity. Reason R: For a p-n junction diode, at applied voltage V the current in the forward bias is more than the current in the reverse bias for ∣Vz∣>±V≥∣V0∣|\text{V}_\text{z}| > \pm \text{V} \geq |\text{V}_0| where V0\text{V}_0 is the threshold voltage and Vz\text{V}_\text{z} is the breakdown voltage.

In the light of the above statements, choose the correct answer from the options given below

Show answer and solution

Answer: (d)

  1. Assertion A: photodiodes are operated in reverse bias for measuring light intensity, not forward bias, so A is false.
  2. Reason R: beyond the threshold voltage the forward current (mA) is much larger than the reverse current (μ\muA) before breakdown, so R is true.
  3. So the answer is (d) A is false but R is true.
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Q287JEE Main 2023 · 24 JAN · SHIFT 1Medium

Special Purpose Diodes · Photodiode

Given below are two statements: one is labelled as Assertion A and the other is labelled as Reason R

Assertion A: Photodiodes are preferably operated in reverse bias condition for light intensity measurement.

Reason R: The current in the forward bias is more than the current in the reverse bias for a p−np - n junction diode.

In the light of the above statements, choose the correct answer from the options given below:

Show answer and solution

Answer: (d)

  1. A: in reverse bias the photocurrent (from minority carriers) is a large fraction of the small reverse current, so intensity changes are easy to measure. A is true.
  2. R: forward current is indeed larger than reverse current, so R is true.
  3. But R does not explain why reverse bias is preferred; the reason is the fractional change in reverse current.
  4. So the answer is (d) both true, R is not the correct explanation.
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Q288MHT CET 2023 · 13 MAY · SHIFT 1Medium

Special Purpose Diodes · Solar cell & device identification

The following graph represents

Figure

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Answer: (d)

  1. The curve lies in the first quadrant: positive VV, positive current in mA, rising sharply (exponentially).
  2. This is the forward-bias curve of a p-n junction; an LED is a p-n diode operated in forward bias.
  3. A solar cell curve lies in the fourth quadrant and reverse curves of a Zener or photodiode have negative VV and II.
  4. So the answer is (d) forward bias characteristics of an LED.
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Q289MHT CET 2023 · 11 MAY · SHIFT 1Medium

Special Purpose Diodes · Solar cell & device identification

Identify the correct circuit diagrams for the normal operation from the following.

Figure

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Answer: (d)

  1. Arrows pointing into the diode mean a photodiode, which must be reverse biased. Arrows pointing out mean an LED, which must be forward biased.
  2. (A): photodiode with + terminal at the anode, forward biased, wrong. (B): photodiode with − terminal at the anode, reverse biased, correct.
  3. (C): LED with − terminal at the anode, reverse biased, wrong. (D): LED with + terminal at the anode, forward biased, correct.
  4. So the answer is (d) (B), (D).
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Q290NEET 2022 · PHASE 2Easy

Special Purpose Diodes · Zener basics

The incorrect statement about the property of a Zener diode is:

Show answer and solution

Answer: (d)

  1. (a) True: both p and n sides are heavily doped.
  2. (b) True: at breakdown the voltage stays constant at VZV_Z.
  3. (c) True: it is designed to work in reverse bias.
  4. (d) False: heavy doping makes the depletion region very thin, not wide.
  5. So the answer is (d).
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Q291JEE Main 2022 · 25 JUL · SHIFT 1Easy

Special Purpose Diodes · LED

The energy band gap of semiconducting material to produce violet (wavelength = 4000A˚\text{\AA}) LED is ______________ eV\text{eV}. (Round off to the nearest integer).

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 3

  1. Eg=hcλE_g = \dfrac{hc}{\lambda}, with hc≈12400hc \approx 12400 eV Å.
  2. Eg=124004000=3.1E_g = \dfrac{12400}{4000} = 3.1 eV
  3. Nearest integer: 33 eV.
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Q292JEE Main 2022 · 28 JUL · SHIFT 1Easy

Special Purpose Diodes · Solar cell & device identification

Identify the solar cell characteristics from the following options:

Show answer and solution

Answer: (b)

  1. A solar cell supplies current without external bias, so its curve lies in the fourth quadrant (V positive, I negative).
  2. Graph (b) shows the curve from short-circuit current on the −I-I axis to open-circuit voltage on the VV axis.
  3. (a) is a diode, (c) is a resistor, (d) is a Zener diode.
  4. So the answer is (b).
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Q293JEE Main 2022 · 29 JUL · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

A 8 V8\text{ V} Zener diode along with a series resistance R\text{R} is connected across a 20 V20\text{ V} supply (as shown in the figure). If the maximum Zener current is 25 mA25\text{ mA}, then the minimum value of R will be _______ Ω\Omega.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 480

  1. RR is smallest when the whole current through it is the maximum Zener current 2525 mA (load drawing nothing).
  2. Drop across RR: 20−8=1220 - 8 = 12 V
  3. Rmin=1225×10−3=480 ΩR_{min} = \frac{12}{25 \times 10^{-3}} = 480\ \Omega
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Q294JEE Main 2022 · 26 JUL · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

In the circuit shown below, maximum zener diode current will be _________ mA\text{mA}.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 9

  1. Zener current is largest at the largest input, 120120 V.
  2. I=120−604 kΩ=15I = \frac{120 - 60}{4\text{ k}\Omega} = 15 mA
  3. IL=6010 kΩ=6I_L = \frac{60}{10\text{ k}\Omega} = 6 mA
  4. IZ,max=15−6=9I_{Z,max} = 15 - 6 = 9 mA
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Q295JEE Main 2022 · 30 JUN · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

The circuit diagram used to study the characteristic curve of a zener diode is connected to variable power supply (0 −- 15 V) as shown in figure. A zener diode with maximum potential Vz = 10 V and maximum power dissipation of 0.4 W is connected across a potential divider arrangement. The value of resistance RP connected in series with the zener diode to protect it from the damage is ________________ Ω\Omega.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 125

  1. Maximum Zener current: I=PVZ=0.410=0.04I = \frac{P}{V_Z} = \frac{0.4}{10} = 0.04 A
  2. At the full supply 1515 V, drop across RPR_P is 15−10=515 - 10 = 5 V.
  3. RP=50.04=125 ΩR_P = \frac{5}{0.04} = 125\ \Omega
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Q296JEE Main 2022 · 24 JUN · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

In the given circuit, the value of current IL will be ____________ mA. (When RL = 1kΩ\Omega)

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 5

  1. Without the Zener the load gets 10×10001800≈5.610 \times \frac{1000}{1800} \approx 5.6 V >5> 5 V, so the Zener conducts and holds 55 V.
  2. IL=51 kΩ=5I_L = \frac{5}{1\text{ k}\Omega} = 5 mA
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Q297JEE Main 2022 · 25 JUN · SHIFT 1Medium

Special Purpose Diodes · Photodiode

The photodiode is used to detect the optical signals. These diodes are preferably operated in reverse biased mode because:

Show answer and solution

Answer: (d)

  1. Light creates electron-hole pairs; this changes the minority carrier concentration a lot (in fraction) but majority carriers only slightly.
  2. Reverse current is carried by minority carriers, so the fractional change in reverse current is large and easy to measure.
  3. So the answer is (d) fractional change in minority carriers produces higher reverse bias current.
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Q298JEE Main 2022 · 30 JUL · SHIFT 2Medium

Special Purpose Diodes · Solar cell & device identification

Figure

The I-V characteristics given in above figure is related to:

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Answer: (d)

  1. The curve cuts the VV-axis at positive VV (open circuit voltage) and the II-axis at negative II (short circuit current).
  2. A curve in the fourth quadrant is the I-V characteristic of a solar cell.
  3. So the answer is (d) solar cell.
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Q299JEE Main 2022 · 28 JUN · SHIFT 2Difficult

Special Purpose Diodes · Zener regulator circuits

A zener of breakdown voltage Vz = 8 V and maximum zener current, IZM = 10 mA is subjected to an input voltage Vi = 10 V with series resistance R = 100 Ω\Omega. In the given circuit RL represents the variable load resistance. The ratio of maximum and minimum value of RL is _____________.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 2

  1. Current through RR: I=10−8100=20I = \dfrac{10 - 8}{100} = 20 mA, and I=IZ+ILI = I_Z + I_L.
  2. RLR_L max when IZ=IZM=10I_Z = I_{ZM} = 10 mA: IL=10I_L = 10 mA, RL,max=810×10−3=800 ΩR_{L,max} = \dfrac{8}{10\times10^{-3}} = 800\,\Omega
  3. RLR_L min when IZ≈0I_Z \approx 0: IL=20I_L = 20 mA, RL,min=820×10−3=400 ΩR_{L,min} = \dfrac{8}{20\times10^{-3}} = 400\,\Omega
  4. RL,maxRL,min=800400=2\dfrac{R_{L,max}}{R_{L,min}} = \dfrac{800}{400} = 2
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Q300NEET 2021Easy

Special Purpose Diodes · Zener basics

Consider the following statements (A) and (B) and identify the correct answer.

(A) A Zener diode is connected in reverse bias, when used as a voltage regulator. (B) The potential barrier of p-n junction lies between 0.1 V to 0.3 V.

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Answer: (d)

  1. (A) Correct: a Zener regulator works in reverse bias (breakdown region).
  2. (B) Incorrect: the barrier potential is about 0.70.7 V for Si and 0.30.3 V for Ge, not 0.10.1 to 0.30.3 V in general.
  3. So the answer is (d) (A) is correct and (B) is incorrect.
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Q301MHT CET 2021 · 21 SEP · SHIFT 2Easy

Special Purpose Diodes · LED

LED is manufactured using zinc selenide then it emits.

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Answer: (c)

  1. ZnSe has a band gap of about 2.72.7 eV.
  2. λ=12402.7 nm≈460 nm\lambda = \dfrac{1240}{2.7}\ \text{nm} \approx 460\ \text{nm}, which is blue.
  3. So the answer is (c) blue light.
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Q302JEE Main 2021 · 26 FEB · SHIFT 1Easy

Special Purpose Diodes · LED

LED is constructed from Ga-As-P semiconducting material. The energy gap of this LED is 1.9 eV. Calculate the wavelength of light emitted and its colour.

[h = 6.63 ×\times 10−-34 Js and c = 3 ×\times 108 ms−1{}^{-1}]

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Answer: (b)

  1. λ=hcEg=6.63×10−34×3×1081.9×1.6×10−19 m\lambda = \dfrac{hc}{E_g} = \dfrac{6.63\times10^{-34}\times3\times10^{8}}{1.9\times1.6\times10^{-19}}\ \text{m}
  2. λ≈6.54×10−7 m=654 nm\lambda \approx 6.54\times10^{-7}\ \text{m} = 654\ \text{nm}
  3. 654654 nm lies in the red region (620620 to 750750 nm).
  4. So the answer is (b) 654 nm and red colour.
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Q303JEE Main 2021 · 22 JUL · SHIFT 2Easy

Special Purpose Diodes · Photodiode

Consider a situation in which reverse biased current of a particular P-N junction increases when it is exposed to a light of wavelength ≤\leq 621 nm. During this process, enhancement in carrier concentration takes place due to generation of hole-electron pairs. The value of band gap is nearly.

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Answer: (d)

  1. Pairs are created only when hcλ≥Eg\dfrac{hc}{\lambda} \ge E_g, so Eg=hcλmaxE_g = \dfrac{hc}{\lambda_{max}}.
  2. Eg=1240621E_g = \dfrac{1240}{621} eV ≈2.0\approx 2.0 eV
  3. So the answer is (d) 22 eV.
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Q304JEE Main 2021 · 24 FEB · SHIFT 2Medium

Special Purpose Diodes · Zener basics

Zener breakdown occurs in a p −- n junction having p and n both:

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Answer: (c)

  1. Zener breakdown happens when a very strong electric field (∼106\sim 10^{6} V/m) across the junction pulls electrons out of covalent bonds.
  2. Such a high field at a few volts needs a very thin depletion layer, which comes from heavy doping on both sides.
  3. So the answer is (c) heavily doped with a narrow depletion layer.
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Q305JEE Main 2021 · 20 JUL · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

For the circuit shown below, calculate the value of Iz:

Figure

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Answer: (a)

  1. Is=100−501000=50I_s = \frac{100 - 50}{1000} = 50 mA
  2. IL=502000=25I_L = \frac{50}{2000} = 25 mA
  3. IZ=50−25=25I_Z = 50 - 25 = 25 mA
  4. So the answer is (a) 2525 mA.
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Q306JEE Main 2021 · 27 AUG · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

A zener diode of power rating 2W is to be used as a voltage regulator. If the zener diode has a breakdown of 10 V and it has to regulate voltage fluctuated between 6 V and 14 V, the value of Rs for safe operation should be ___________ Ω\Omega.

Figure

Numerical answer type. Work it out, then open the answer.

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Answer: 20

  1. Maximum safe Zener current: I=PVZ=210=0.2I = \frac{P}{V_Z} = \frac{2}{10} = 0.2 A
  2. Worst case is the highest input 1414 V: drop across Rs=14−10=4R_s = 14 - 10 = 4 V.
  3. Rs=40.2=20 ΩR_s = \frac{4}{0.2} = 20\ \Omega
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Q307JEE Main 2021 · 26 AUG · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

For the given circuit, the power across Zener diode is .............. mW.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 120

  1. I=24−101 kΩ=14I = \frac{24 - 10}{1\text{ k}\Omega} = 14 mA
  2. IL=105 kΩ=2I_L = \frac{10}{5\text{ k}\Omega} = 2 mA, so IZ=14−2=12I_Z = 14 - 2 = 12 mA
  3. PZ=VZIZ=10×12=120P_Z = V_Z I_Z = 10 \times 12 = 120 mW
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Q308JEE Main 2021 · 22 JUL · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

In a given circuit diagram, a 5 V zener diode along with a series resistance is connected across a 50 V power supply. The minimum value of the resistance required, if the maximum zener current is 90 mA will be __________ Ω\Omega.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 500

  1. RR is smallest when the current through it equals the maximum Zener current 9090 mA.
  2. Drop across RR: 50−5=4550 - 5 = 45 V
  3. Rmin=450.09=500 ΩR_{min} = \frac{45}{0.09} = 500\ \Omega
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Q309JEE Main 2021 · 20 JUL · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

A zener diode having zener voltage 8 V and power dissipation rating of 0.5 W is connected across a potential divider arranged with maximum potential drop across zener diode is as shown in the diagram. The value of protective resistance Rp is .................... Ω\Omega.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 192

  1. Maximum Zener current: I=PVZ=0.58=62.5I = \frac{P}{V_Z} = \frac{0.5}{8} = 62.5 mA
  2. At the full potential divider output 2020 V, drop across RpR_p is 20−8=1220 - 8 = 12 V.
  3. Rp=120.0625=192 ΩR_p = \frac{12}{0.0625} = 192\ \Omega
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Q310JEE Main 2021 · 16 MAR · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

The value of power dissipated across the zener diode (Vz = 15V) connected in the circuit as shown in the figure is x ×\times 10−-1 watt.

Figure

The value of x, to the nearest integer, is __________.

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 5

  1. Without the Zener the load gets 22×90125=15.8422 \times \frac{90}{125} = 15.84 V >15> 15 V, so the Zener holds 1515 V.
  2. Is=22−1535=0.2I_s = \frac{22 - 15}{35} = 0.2 A, IL=1590=16I_L = \frac{15}{90} = \frac{1}{6} A
  3. IZ=0.2−16=130I_Z = 0.2 - \frac{1}{6} = \frac{1}{30} A
  4. P=15×130=0.5P = 15 \times \frac{1}{30} = 0.5 W =5×10−1= 5 \times 10^{-1} W, so x=5x = 5.
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Q311JEE Main 2021 · 26 FEB · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

The zener diode has a Vz = 30V. The current passing through the diode for the following circuit is ________ mA.

Figure

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 9

  1. Without the Zener the load gets 90×59=5090 \times \frac{5}{9} = 50 V >30> 30 V, so the Zener holds 3030 V.
  2. I=90−304 kΩ=15I = \frac{90 - 30}{4\text{ k}\Omega} = 15 mA
  3. IL=305 kΩ=6I_L = \frac{30}{5\text{ k}\Omega} = 6 mA
  4. IZ=15−6=9I_Z = 15 - 6 = 9 mA
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Q312MHT CET 2021 · 24 SEP · SHIFT 1Medium

Special Purpose Diodes · Photodiode

A p-n junction photodiode is fabricated from a semiconductor with a band gap of 2.5 eV2.5\text{ eV}. It can detect a signal of wavelength [Planck's constant =6.6×10−34 Js,c=3×108 m/s,e=1.6×10−19 C= 6.6 \times 10^{-34}\text{ Js}, \text{c} = 3 \times 10^{8}\text{ m/s}, \text{e} = 1.6 \times 10^{-19}\text{ C}]

Show answer and solution

Answer: (c)

  1. A photodiode detects light only if photon energy ≥Eg\geq E_g, so λmax=hcEg\lambda_{max} = \dfrac{hc}{E_g}.
  2. λmax=6.6×10−34×3×1082.5×1.6×10−19=4.95×10−7 m≈5000 A˚\lambda_{max} = \dfrac{6.6\times10^{-34}\times3\times10^{8}}{2.5\times1.6\times10^{-19}} = 4.95\times10^{-7}\text{ m} \approx 5000\text{ Å}
  3. 6000 Å, 6000 nm and 4000 nm are all longer than this cutoff, so they cannot be detected.
  4. So the answer is (c) 5000 Å.
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Q313JEE Main 2020 · 3 SEP · SHIFT 2Easy

Special Purpose Diodes · Photodiode

If a semiconductor photodiode can detect a photon with a maximum wavelength of 400 nm, then its band gap energy is:

Planck’s constant h = 6.63 ×\times 10–34 J.s. Speed of light c = 3 ×\times 108 m/s

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Answer: (c)

  1. Eg=hcλmaxE_g = \dfrac{hc}{\lambda_{max}}
  2. Eg=6.63×10−34×3×108400×10−9=4.97×10−19E_g = \dfrac{6.63\times10^{-34}\times3\times10^{8}}{400\times10^{-9}} = 4.97\times10^{-19} J =4.97×10−191.6×10−19= \dfrac{4.97\times10^{-19}}{1.6\times10^{-19}} eV ≈3.1\approx 3.1 eV
  3. So the answer is (c) 3.13.1 eV.
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Q314JEE Main 2020 · 5 SEP · SHIFT 1Medium

Special Purpose Diodes · Photodiode

With increasing biasing voltage of a photodiode, the photocurrent magnitude:

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Answer: (c)

  1. In reverse bias, increasing the voltage first helps collect more photo-generated carriers, so the photocurrent rises.
  2. Once all generated carriers are collected, the current depends only on light intensity and stays constant.
  3. So the answer is (c) increases initially and saturates finally.
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Q315JEE Main 2020 · 5 SEP · SHIFT 2Difficult

Special Purpose Diodes · Zener regulator circuits

Two Zener diodes (A and B) having breakdown voltages of 6 V and 4 V respectively, are connected as shown in the circuit below. The output voltage V0 variation with input voltage linearly increasing with time, is given by:

(Vinput = 0 V at t = 0)

(figures are qualitative)

Figure

Show answer and solution

Answer: (d)

  1. For Vin<4V_{in} < 4 V neither Zener breaks down, so V0V_0 rises with VinV_{in} at the full rate.
  2. For 4<Vin<64 < V_{in} < 6 V, Zener B conducts with its 100 Ω100\,\Omega in series; this extra branch draws current, so V0V_0 still rises but more slowly.
  3. When V0V_0 reaches 6 V, Zener A breaks down and holds V0=6V_0 = 6 V constant.
  4. So the answer is (d): steep rise to 4 V, slower rise to 6 V, then flat at 6 V.
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Q316JEE Main 2020 · 4 SEP · SHIFT 1Difficult

Special Purpose Diodes · Zener regulator circuits

Take the breakdown voltage of the

zener diode used in the given circuit as 6V.

For the input voltage shown in figure below,

the time variation of the output voltage is:

(Graphs drawn are schematic and not to scale)

Figure

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Answer: (c)

  1. The two Zeners are connected back to back across the output, through series resistor R1R_1.
  2. For ∣Vin∣<6|V_{in}| < 6 V one Zener is reverse biased below breakdown, so no current flows and V0=VinV_0 = V_{in}.
  3. For ∣Vin∣>6|V_{in}| > 6 V the reverse-biased Zener breaks down and the output is clipped at +6+6 V or −6-6 V (forward drop of the other diode neglected).
  4. So the output is a sine wave clipped at both +6+6 V and −6-6 V. The answer is (c).
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Q317JEE Main 2020 · 9 JAN · SHIFT 2Difficult

Special Purpose Diodes · Zener regulator circuits

The circuit shown below is working as a 8 V dc regulated voltage source. When 12 V is used as input, the power dissipated (in mW) in each diode is; (considering both zener diodes are identical) _________.

Figure

Numerical answer type. Work it out, then open the answer.

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Answer: 40

  1. The two identical Zeners in series hold V0=8V_0 = 8 V, so each has 44 V across it.
  2. Drop across the two resistors: 12−8=412 - 8 = 4 V, total resistance 400 Ω400\,\Omega.
  3. I=4400=10I = \dfrac{4}{400} = 10 mA (no load current drawn).
  4. Power in each diode: P=4×10×10−3=40P = 4 \times 10\times10^{-3} = 40 mW
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Q318MHT CET 2019 · 3 MAY · SHIFT 1Easy

Special Purpose Diodes · LED

V−IV - I characterstics of LED is shown correctly by graph

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Answer: (b)

  1. An LED is operated in forward bias, so only the first quadrant is drawn.
  2. Current stays near zero up to the threshold voltage and then rises steeply.
  3. Graph (b) shows this; (a) has a reverse breakdown branch, (c) is a solar cell, (d) saturates.
  4. So the answer is (b).
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Q319NEET 2019Easy

Special Purpose Diodes · LED

An LED is constructed from a p-n junction diode using GaAsP. The energy gap is 1.9 eV1.9\text{ eV}. The wavelength of the light emitted will be equal to

Show answer and solution

Answer: (c)

  1. λ=hcEg\lambda = \dfrac{hc}{E_g}
  2. λ=6.63×10−34×3×1081.9×1.6×10−19=1.989×10−253.04×10−19 m\lambda = \dfrac{6.63\times10^{-34}\times3\times10^{8}}{1.9\times1.6\times10^{-19}} = \dfrac{1.989\times10^{-25}}{3.04\times10^{-19}}\ \text{m}
  3. λ≈6.54×10−7 m=654 nm\lambda \approx 6.54\times10^{-7}\ \text{m} = 654\ \text{nm}
  4. So the answer is (c) 654654 nm.
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Q320JEE Main 2019 · 12 APR · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

Figure shows a DC voltage regulator circuit, with a Zener diode of breakdown voltage = 6V. If the unregulated input voltage varies between 10 V to 16 V, then what is maximum Zener current?

Figure

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Answer: (a)

  1. Zener current is largest at the largest input, 1616 V.
  2. Is=16−62 kΩ=5I_s = \frac{16 - 6}{2\text{ k}\Omega} = 5 mA
  3. IL=64 kΩ=1.5I_L = \frac{6}{4\text{ k}\Omega} = 1.5 mA
  4. IZ,max=5−1.5=3.5I_{Z,max} = 5 - 1.5 = 3.5 mA, so the answer is (a).
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Q321JEE Main 2019 · 10 APR · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

The figure represents a voltage regulator circuit using a Zener diode. The breakdown voltage of the Zener diode is 6 V and the load resistance is, RL = 4kΩ\Omega. The series resistance of the circuit is Ri = 1 kΩ\Omega. If the battery voltage VB varies from 8 V to 16 V, what are the minimum and maximum values of the current through Zener diode?

Figure

Show answer and solution

Answer: (a)

  1. Load current is fixed: IL=64 kΩ=1.5I_L = \frac{6}{4\text{ k}\Omega} = 1.5 mA
  2. At VB=8V_B = 8 V: I=8−61 kΩ=2I = \frac{8 - 6}{1\text{ k}\Omega} = 2 mA, so IZ=2−1.5=0.5I_Z = 2 - 1.5 = 0.5 mA
  3. At VB=16V_B = 16 V: I=16−61 kΩ=10I = \frac{16 - 6}{1\text{ k}\Omega} = 10 mA, so IZ=10−1.5=8.5I_Z = 10 - 1.5 = 8.5 mA
  4. So the answer is (a) 0.50.5 mA; 8.58.5 mA.
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Q322JEE Main 2019 · 8 APR · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

The reverse breakdown voltage of a Zener diode is 5.6 V in the given circuit.

The current IZ through the Zener is:

Figure

Show answer and solution

Answer: (d)

  1. I=9−5.6200=17I = \frac{9 - 5.6}{200} = 17 mA
  2. IL=5.6800=7I_L = \frac{5.6}{800} = 7 mA
  3. IZ=17−7=10I_Z = 17 - 7 = 10 mA
  4. So the answer is (d) 1010 mA.
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Q323JEE Main 2019 · 11 JAN · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

In the given circuit the current through Zener Diode is close to:

Figure

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Answer: (a)

  1. Without the Zener, the voltage across R2=1500 ΩR_2 = 1500\ \Omega is 12×15002000=912 \times \frac{1500}{2000} = 9 V (the extra load R2R_2 only lowers it further).
  2. 99 V <VZ=10< V_Z = 10 V, so the Zener never reaches breakdown.
  3. So the answer is (a) 0.00.0 mA.
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Q324JEE Main 2019 · 10 JAN · SHIFT 2Medium

Special Purpose Diodes · Zener regulator circuits

For the circuit shown below, the current through the Zener diode is -

Figure

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Answer: (d)

  1. Without the Zener the load gets 120×1015=80120 \times \frac{10}{15} = 80 V >50> 50 V, so the Zener holds 5050 V.
  2. I=120−505 kΩ=14I = \frac{120 - 50}{5\text{ k}\Omega} = 14 mA
  3. IL=5010 kΩ=5I_L = \frac{50}{10\text{ k}\Omega} = 5 mA
  4. IZ=14−5=9I_Z = 14 - 5 = 9 mA, so the answer is (d).
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Q325JEE Main 2018 · 16 APR · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

In the given circuit, the current through zener diode is:

Figure

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Answer: (d)

  1. Without the Zener, R2R_2 would get 15×15002000=11.2515 \times \frac{1500}{2000} = 11.25 V >10> 10 V, so the Zener holds 1010 V.
  2. I=15−10500=10I = \frac{15 - 10}{500} = 10 mA
  3. I2=101500=6.67I_2 = \frac{10}{1500} = 6.67 mA
  4. IZ=10−6.67=3.3I_Z = 10 - 6.67 = 3.3 mA, so the answer is (d).
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Q326JEE Main 2016 · 9 APR · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

An experiment is performed to determine the I - V characteristics of a Zener diode, which has a protective resistance of R = 100 Ω\Omega, and a maximum power of dissipation rating of 1 W. The minimum voltage range of the DC source in the circuit is:

Show answer and solution

Answer: (d)

  1. To trace the full reverse characteristic, the source must exceed VZV_Z plus the drop IRIR at the largest safe current.
  2. A 11 W Zener used with R=100 ΩR = 100\ \Omega typically allows Imax≈P/R=1/100=0.1I_{max} \approx \sqrt{P/R} = \sqrt{1/100} = 0.1 A, so IR≈10IR \approx 10 V.
  3. For P=VZImax=1P = V_Z I_{max} = 1 W, VZ≈10V_Z \approx 10 V, so the source must reach about VZ+IR≈20V_Z + IR \approx 20 V.
  4. Only 00–2424 V covers this, so the answer is (d).
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Q327JEE Main 2016Medium

Special Purpose Diodes · Solar cell & device identification

Identify the semiconductor devices whose characteristics are given below, in the order (a),(b),(c),(d)(a), (b), (c), (d):

Figure

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Answer: (a)

  1. (a): current rises only in forward bias, almost zero in reverse: simple diode.
  2. (b): sharp current rise at a fixed reverse voltage: Zener diode (breakdown).
  3. (c): curve shifts into the fourth quadrant on illumination: solar cell.
  4. (d): resistance falls as light intensity rises: light dependent resistance.
  5. So the answer is (a) simple diode, Zener diode, solar cell, LDR.
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Q328JEE Main 2015 · 11 APR · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

The value of the resistor, RS, needed in the dc voltage regulator circuit shown here, equals:

Figure

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Answer: (c)

  1. Drop across RSR_S: Vi−VLV_i - V_L
  2. Current through RSR_S: I=IZ+IL=nIL+IL=(n+1)ILI = I_Z + I_L = nI_L + I_L = (n+1)I_L
  3. RS=Vi−VL(n+1)ILR_S = \frac{V_i - V_L}{(n+1)I_L}
  4. So the answer is (c).
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Q329JEE Main 2014 · 12 APR · SHIFT 1Easy

Special Purpose Diodes · LED

For LED's to emit light in visible region of electromagnetic light, it should have energy band gap in the range of:

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Answer: (d)

  1. Visible light spans about 400400 nm to 700700 nm.
  2. E=1240λ (nm)E = \dfrac{1240}{\lambda\,(\text{nm})} eV: 1240700≈1.8\dfrac{1240}{700} \approx 1.8 eV and 1240400=3.1\dfrac{1240}{400} = 3.1 eV.
  3. So the band gap must be about 1.71.7 eV to 3.03.0 eV.
  4. So the answer is (d).
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Q330JEE Main 2014 · 11 APR · SHIFT 1Medium

Special Purpose Diodes · Zener regulator circuits

A Zener diode is connected to a battery and a load as shown below:

The currents I, IZ and IL are respectively

Figure

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Answer: (d)

  1. Without the Zener the load gets 60×26=2060 \times \frac{2}{6} = 20 V >10> 10 V, so the Zener holds 1010 V.
  2. I=60−104 kΩ=12.5I = \frac{60 - 10}{4\text{ k}\Omega} = 12.5 mA
  3. IL=102 kΩ=5I_L = \frac{10}{2\text{ k}\Omega} = 5 mA, IZ=12.5−5=7.5I_Z = 12.5 - 5 = 7.5 mA
  4. So the answer is (d) 12.512.5 mA, 7.57.5 mA, 55 mA.
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Q331NEET 2014 · AIPMTMedium

Special Purpose Diodes · Solar cell & device identification

The given graph represents V-I characteristic for a semiconductor device.

Figure

Which of the following statement is correct?

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Answer: (a)

  1. The curve lies in the fourth quadrant, which is the V-I curve of a solar cell.
  2. At A the current is zero, so the voltage there is the open circuit voltage VocV_{oc}.
  3. At B the voltage is zero, so the current there is the short circuit current IscI_{sc}.
  4. So the answer is (a).
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Q332JEE Main 2013Easy

Special Purpose Diodes · LED

The I-V\text{I-}V characteristic of an LEDLED is

Show answer and solution

Answer: (a)

  1. An LED conducts only in forward bias, so its curves lie in the first quadrant.
  2. Current rises sharply after a threshold voltage that grows with band gap, i.e. from red to blue.
  3. Graph (a) shows this family of forward-bias curves; (b) and (d) are solar cell / photodiode curves, (c) is a tunnel-diode type curve.
  4. So the answer is (a).
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Q333NEET 2011 · AIPMT · MAINSMedium

Special Purpose Diodes · Zener regulator circuits

A Zener diode, having breakdown voltage equal to 15 V, is used in a voltage regulator circuit shown in figure. The current through the diode is

Figure

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Answer: (a)

  1. Output held at 1515 V, so drop across 250 Ω250\ \Omega is 20−15=520 - 15 = 5 V.
  2. I=5250=20I = \frac{5}{250} = 20 mA
  3. IL=151 kΩ=15I_L = \frac{15}{1\text{ k}\Omega} = 15 mA
  4. IZ=20−15=5I_Z = 20 - 15 = 5 mA, so the answer is (a).
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Q334NEET 2009 · AIPMTEasy

Special Purpose Diodes · Photodiode

A p-n photodiode is fabricated from a semiconductor with a band gap of 2.5 eV. It can detect a signal of wavelength

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Answer: (c)

  1. Detection needs hcλ≥Eg\dfrac{hc}{\lambda} \ge E_g, so λ≤12402.5 nm=496 nm\lambda \le \dfrac{1240}{2.5}\ \text{nm} = 496\ \text{nm}.
  2. Only 40004000 Å =400= 400 nm is shorter than 496496 nm.
  3. So the answer is (c) 40004000 Å.
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Q335NEET 2008 · AIPMTEasy

Special Purpose Diodes · Photodiode

A p-n photodiode is made of a material with a band gap of 2.0 eV. The minimum frequency of the radiation that can be absorbed by the material is nearly

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Answer: (d)

  1. Minimum frequency: hν=Eg⇒ν=Eghh\nu = E_g \Rightarrow \nu = \dfrac{E_g}{h}
  2. ν=2.0×1.6×10−196.63×10−34≈4.8×1014\nu = \dfrac{2.0\times1.6\times10^{-19}}{6.63\times10^{-34}} \approx 4.8\times10^{14} Hz
  3. So the answer is (d) 5×10145\times10^{14} Hz.
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Q336NEET 2005 · AIPMTEasy

Special Purpose Diodes · Zener basics

Zener diode is used for

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Answer: (c)

  1. At breakdown the Zener voltage stays constant even when the current changes.
  2. So it keeps the output voltage steady, i.e. voltage stabilisation.
  3. So the answer is (c) stabilisation.
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Q337NEET 2004 · AIPMTMedium

Special Purpose Diodes · Solar cell & device identification

In a p-n junction photo cell, the value of the photo-electromotive force produced by monochromatic light is proportional to

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Answer: (b)

  1. In a photocell, each absorbed photon (with hν>Egh\nu > E_g) creates an electron-hole pair that is separated by the junction field.
  2. More intensity means more photons per second, more pairs, and so a larger photo-emf.
  3. Frequency above the threshold does not increase the number of pairs.
  4. So the answer is (b) the intensity of the light falling on the cell.
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Q338MHT CET 2026 · 13 MAY · SHIFT 1Easy

Junction Transistor · Structure & biasing

An n-p-n transistor can be considered to be equivalent to two diodes connected. Which one of the following figure is correct?

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Answer: (b)

  1. An n-p-n transistor is n (emitter), p (base), n (collector), so it has two p-n junctions sharing the p base.
  2. In each junction diode the arrow points from p to n, so both diodes point away from B: one from B to E and one from B to C.
  3. Only figure (b) shows E ◁ B ▷ C.
  4. So the answer is (b).
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Q339MHT CET 2026 · 19 APR · SHIFT 2Easy

Junction Transistor · Structure & biasing

In a transistor, comparing the doping of emitter, base and collector, the part which is heavily doped and that which is lightly doped are respectively

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Answer: (b)

  1. The emitter must supply many carriers, so it is heavily doped.
  2. The base is thin and lightly doped so that few carriers recombine there.
  3. The collector is moderately doped.
  4. So the answer is (b) emitter and base.
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Q340MHT CET 2026 · 14 MAY · SHIFT 1Easy

Junction Transistor · Current relations

For a transistor, the current ratio αDC=6970\alpha_{DC} = \frac{69}{70}. The current gain βDC\beta_{DC} is

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Answer: (c)

  1. β=α1−α\beta = \dfrac{\alpha}{1 - \alpha}
  2. β=69/701/70=69\beta = \dfrac{69/70}{1/70} = 69
  3. So the answer is (c) 69.
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Q341MHT CET 2026 · 13 APR · SHIFT 2Easy

Junction Transistor · Current relations

If transistor having α=0.9\alpha = 0.9, is used in CE configuration, then for a change of 0.40.4 mA in base current, what will be the change in collector current?

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Answer: (a)

  1. β=α1−α=0.90.1=9\beta = \dfrac{\alpha}{1 - \alpha} = \dfrac{0.9}{0.1} = 9
  2. ΔIC=β ΔIB=9×0.4=3.6\Delta I_C = \beta\,\Delta I_B = 9 \times 0.4 = 3.6 mA
  3. So the answer is (a) 3.6 mA.
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Q342MHT CET 2026 · 13 APR · SHIFT 1Easy

Junction Transistor · Current relations

In transistor amplifier, base emitter junction is forward biased and collector base junction is reversed biased. The current gain is

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Answer: (a)

  1. A transistor amplifier is usually in CE mode: input current is base current, output current is collector current.
  2. Current gain β=ΔICΔIB\beta = \dfrac{\Delta I_C}{\Delta I_B}
  3. So the answer is (a).
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Q343MHT CET 2026 · 14 MAY · SHIFT 2Easy

Junction Transistor · CE amplifier gains

The current gain in the common emitter mode of a transistor is 1010. The input impedance is 20 kΩ20\,k\Omega and load resistance 100 kΩ100\,k\Omega. The power gain is

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Answer: (b)

  1. Voltage gain AV=βRLRi=10×10020=50A_V = \beta\frac{R_L}{R_i} = 10 \times \frac{100}{20} = 50
  2. Power gain AP=βAV=10×50=500A_P = \beta A_V = 10 \times 50 = 500
  3. So the answer is (b) 500.
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Q344MHT CET 2026 · 14 MAY · SHIFT 1Easy

Junction Transistor · CE amplifier gains

β,RL\beta, R_L and rr are the a.c. current gain, load resistance and the input resistance of a transistor respectively in common emitter configuration, the voltage gain and the power gain are respectively

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Answer: (a)

  1. AV=ΔVoΔVi=β ΔIBRLΔIB r=βRLrA_V = \frac{\Delta V_o}{\Delta V_i} = \frac{\beta\,\Delta I_B R_L}{\Delta I_B\, r} = \beta\frac{R_L}{r}
  2. AP=β×AV=β2RLrA_P = \beta \times A_V = \beta^2\frac{R_L}{r}
  3. So the answer is (a).
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Q345MHT CET 2026 · 13 MAY · SHIFT 1Easy

Junction Transistor · CE amplifier gains

In common emitter amplifier, using output resistance 5000 Ω5000\,\Omega and input resistance 2000 Ω2000\,\Omega, if the peak value of input signal voltage is 1010 mV and β=50\beta = 50, then peak value of output voltage is

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Answer: (c)

  1. AV=βRoRi=50×50002000=125A_V = \beta\frac{R_o}{R_i} = 50 \times \frac{5000}{2000} = 125
  2. Vo=AVVi=125×10 mV=1250V_o = A_V V_i = 125 \times 10\text{ mV} = 1250 mV
  3. So the answer is (c) 1.251.25 V.
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Q346MHT CET 2026 · 20 APR · SHIFT 1Easy

Junction Transistor · CE amplifier gains

In a common emitter transistor amplifier, AC current gain is 6565, the load resistance is 5400 Ω5400\,\Omega and input resistance of the transistor is 450 Ω450\,\Omega. The voltage gain is

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Answer: (c)

  1. AV=βRLriA_V = \beta\frac{R_L}{r_i}
  2. AV=65×5400450=65×12=780A_V = 65 \times \frac{5400}{450} = 65 \times 12 = 780
  3. So the answer is (c) 780.
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Q347MHT CET 2026 · 17 APR · SHIFT 2Easy

Junction Transistor · CE amplifier gains

In common emitter configuration of transistor amplifier, ri,RLr_i, R_L and β\beta represent the input resistance, load resistance and the a.c. current gain respectively. The voltage gain AVA_V and power gain APA_P are represented in magnitude respectively by

Show answer and solution

Answer: (c)

  1. AV=βRLriA_V = \beta\frac{R_L}{r_i}
  2. AP=βAV=β2RLriA_P = \beta A_V = \beta^2\frac{R_L}{r_i}
  3. So the answer is (c).
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Q348MHT CET 2026 · 13 MAY · SHIFT 2Medium

Junction Transistor · Current relations

In an n-p-n transistor the collector current is 99 mA. If 90%90\% of the electrons from the emitter reach the collector then

Show answer and solution

Answer: (a)

  1. α=0.9\alpha = 0.9, so IE=ICα=90.9=10I_E = \dfrac{I_C}{\alpha} = \dfrac{9}{0.9} = 10 mA.
  2. IB=IE−IC=10−9=1I_B = I_E - I_C = 10 - 9 = 1 mA.
  3. β=ICIB=91=9\beta = \dfrac{I_C}{I_B} = \dfrac{9}{1} = 9
  4. So the answer is (a) β=9.0\beta = 9.0.
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Q349MHT CET 2026 · 18 APR · SHIFT 2Medium

Junction Transistor · Current relations

In an NPN transistor, the collector current is 28 mA. If 80% electrons reach the collector, its base current in mA is

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Answer: (a)

  1. IC=0.8 IE⇒IE=280.8=35I_C = 0.8\,I_E \Rightarrow I_E = \dfrac{28}{0.8} = 35 mA.
  2. IB=IE−IC=35−28=7I_B = I_E - I_C = 35 - 28 = 7 mA.
  3. So the answer is (a) 77 mA.
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Q350MHT CET 2026 · 13 APR · SHIFT 1Medium

Junction Transistor · Current relations

In common emitter mode of transistor, the d.c. current gain is 20, the emitter current is 7 mA. The collector current is

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Answer: (a)

  1. α=β1+β=2021\alpha = \dfrac{\beta}{1+\beta} = \dfrac{20}{21}
  2. IC=αIE=2021×7=203I_C = \alpha I_E = \dfrac{20}{21} \times 7 = \dfrac{20}{3} mA.
  3. So the answer is (a) 203\dfrac{20}{3} mA.
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Q351MHT CET 2026 · 11 APR · SHIFT 2Medium

Junction Transistor · Current relations

In common emitter mode of transistor, the d.c. current gain is 2020, the emitter current is 77 mA. The collector current is

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Answer: (b)

  1. α=β1+β=2021\alpha = \dfrac{\beta}{1+\beta} = \dfrac{20}{21}
  2. IC=αIE=2021×7=203I_C = \alpha I_E = \dfrac{20}{21} \times 7 = \dfrac{20}{3} mA.
  3. So the answer is (b) 203\dfrac{20}{3} mA.
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Q352MHT CET 2026 · 16 APR · SHIFT 1Medium

Junction Transistor · CE amplifier gains

In a transistor amplifier, a change of 0.2 mA in the base current causes a change of 5 mA in the collector current. If input resistance is 22 kΩ\Omega and voltage gain is 75, the load resistance used in the circuit is

Show answer and solution

Answer: (b)

  1. β=ΔICΔIB=50.2=25\beta = \dfrac{\Delta I_C}{\Delta I_B} = \dfrac{5}{0.2} = 25
  2. Voltage gain AV=βRLRi⇒75=25×RL2 kΩA_V = \beta \dfrac{R_L}{R_i} \Rightarrow 75 = 25 \times \dfrac{R_L}{2\text{ k}\Omega}
  3. RL=6R_L = 6 kΩ\Omega
  4. So the answer is (b) 66 kΩ\Omega.
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Q353MHT CET 2026 · 15 APR · SHIFT 2Medium

Junction Transistor · CE amplifier gains

In common emitter amplifier, a change of 0.20.2 mA in the base current causes a change of 55 mA in the collector current. If input resistance is 22 kΩ\Omega and voltage gain is 7575, the load resistance used in the circuit is

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Answer: (d)

  1. β=ΔICΔIB=50.2=25\beta = \dfrac{\Delta I_C}{\Delta I_B} = \dfrac{5}{0.2} = 25
  2. AV=βRLRi⇒75=25×RL2 kΩA_V = \beta \dfrac{R_L}{R_i} \Rightarrow 75 = 25 \times \dfrac{R_L}{2\text{ k}\Omega}
  3. RL=6R_L = 6 kΩ\Omega
  4. So the answer is (d) 66 kΩ\Omega.
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Q354MHT CET 2026 · 11 APR · SHIFT 1Medium

Junction Transistor · CE amplifier gains

In common emitter transistor amplifier, the output resistance is 500500 kΩ\Omega and the current gain β=50\beta = 50. If power gain of amplifier is 5×1065 \times 10^{6}, what is the input resistance?

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Answer: (d)

  1. Power gain =β2RoRi= \beta^2 \dfrac{R_o}{R_i}
  2. 5×106=(50)2×500×103Ri5 \times 10^6 = (50)^2 \times \dfrac{500 \times 10^3}{R_i}
  3. Ri=2500×5×1055×106=250 ΩR_i = \dfrac{2500 \times 5 \times 10^5}{5 \times 10^6} = 250\ \Omega
  4. So the answer is (d) 250 Ω250\ \Omega.
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Q355MHT CET 2026 · 15 MAY · SHIFT 1Medium

Junction Transistor · Characteristics & transistor testing

In an n-p-n transistor in common emitter configuration when VBEV_{BE} is increased by small amount then

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Answer: (a)

  1. Raising VBEV_{BE} increases forward bias of the base-emitter junction, so IBI_B increases.
  2. In the active region IC=βIBI_C = \beta I_B, so ICI_C also increases in proportion.
  3. So the answer is (a).
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Q356MHT CET 2025 · 26 APR · SHIFT 2Easy

Junction Transistor · Current relations

For a transistor, αdc\alpha_\text{dc} and βdc\beta_\text{dc} are the current ratios, then the value of βdc−αdcαdc×βdc\frac{\beta_\text{dc} - \alpha_\text{dc}}{\alpha_\text{dc} \times \beta_\text{dc}}

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Answer: (d)

  1. β=α1−α⇒β−αβ=α⇒β−α=αβ\beta = \dfrac{\alpha}{1-\alpha} \Rightarrow \beta - \alpha\beta = \alpha \Rightarrow \beta - \alpha = \alpha\beta
  2. β−ααβ=1\dfrac{\beta - \alpha}{\alpha\beta} = 1
  3. So the answer is (d) 1.
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Q357MHT CET 2025 · 23 APR · SHIFT 1Easy

Junction Transistor · Current relations

In a common emitter transistor amplifier circuit, the current gain α=0.8\alpha = 0.8. If the base current changes by 3 μA3\,\mu\text{A} then the collector current changes by

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Answer: (b)

  1. β=α1−α=0.80.2=4\beta = \dfrac{\alpha}{1 - \alpha} = \dfrac{0.8}{0.2} = 4
  2. ΔIC=β ΔIB=4×3=12 μ\Delta I_C = \beta\,\Delta I_B = 4 \times 3 = 12\,\muA
  3. So the answer is (b) 12 μ12\,\muA.
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Q358MHT CET 2025 · 23 APR · SHIFT 1Easy

Junction Transistor · Current relations

In the case of common emitter transistor amplifier, the ratio of collector current to emitter current is 0.96, then the current gain (β)(\beta) of the amplifier is

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Answer: (c)

  1. α=ICIE=0.96\alpha = \dfrac{I_C}{I_E} = 0.96
  2. β=α1−α=0.960.04=24\beta = \dfrac{\alpha}{1 - \alpha} = \dfrac{0.96}{0.04} = 24
  3. So the answer is (c) 24.
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Q359MHT CET 2025 · 19 APR · SHIFT 1Easy

Junction Transistor · Current relations

For a common emitter transistor, if ICIE=0.95\frac{I_\text{C}}{I_\text{E}} = 0.95, then the current gain is

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Answer: (c)

  1. α=ICIE=0.95\alpha = \dfrac{I_C}{I_E} = 0.95
  2. β=0.950.05=19\beta = \dfrac{0.95}{0.05} = 19
  3. So the answer is (c) 19.
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Q360MHT CET 2025 · 19 APR · SHIFT 1Easy

Junction Transistor · Current relations

In the case of constant ' α\alpha ' and ' β\beta ' of a transistor ( α\alpha and β\beta are current ratios)

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Answer: (b)

  1. IE=IB+ICI_E = I_B + I_C, so IC<IEI_C < I_E and α=ICIE<1\alpha = \dfrac{I_C}{I_E} < 1.
  2. IB≪ICI_B \ll I_C, so β=ICIB>1\beta = \dfrac{I_C}{I_B} > 1 (typically 20 to 200).
  3. So the answer is (b) β>1,α<1\beta > 1, \alpha < 1.
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Q361MHT CET 2025 · 22 APR · SHIFT 1Easy

Junction Transistor · CE amplifier gains

In a common emitter transistor amplifier, the output voltage and input voltage have a phase difference of

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Answer: (d)

  1. In CE mode, a rise in input raises ICI_C, so drop across RLR_L rises and VCE=VCC−ICRLV_{CE} = V_{CC} - I_C R_L falls.
  2. Output is inverted: phase difference =180∘=π= 180^\circ = \pi rad.
  3. So the answer is (d) πc\pi^c.
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Q362MHT CET 2025 · 21 APR · SHIFT 2Easy

Junction Transistor · CE amplifier gains

In common emitter mode of a transistor, the current gain is 8. The input impedance is 25 kΩ25\text{ k}\Omega and load resistance is 75 kΩ75\text{ k}\Omega. The power gain is

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Answer: (a)

  1. AP=β2RLRiA_P = \beta^2\frac{R_L}{R_i}
  2. AP=82×7525=64×3=192A_P = 8^2 \times \frac{75}{25} = 64 \times 3 = 192
  3. So the answer is (a) 192.
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Q363MHT CET 2025 · 20 APR · SHIFT 1Easy

Junction Transistor · CE amplifier gains

When an n-p-n junction transistor is used as an amplifier in common emitter mode,

Show answer and solution

Answer: (c)

  1. (a) False: base-emitter junction is forward biased.
  2. (b) False: CE input impedance is low and output impedance is high.
  3. (c) True: input is between base and emitter, output between collector and emitter.
  4. (d) False: output is 180∘180^\circ out of phase with input.
  5. So the answer is (c).
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Q364MHT CET 2025 · 19 APR · SHIFT 2Easy

Junction Transistor · CE amplifier gains

In a transistor amplifier, AC current gain is 64, the load resistance is 5400 Ω5400\ \Omega and the input resistance of the transistor is 540 Ω540\ \Omega. The voltage gain is

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Answer: (c)

  1. AV=βRLRiA_V = \beta\frac{R_L}{R_i}
  2. AV=64×5400540=64×10=640A_V = 64 \times \frac{5400}{540} = 64 \times 10 = 640
  3. So the answer is (c) 640.
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Q365MHT CET 2025 · 21 APR · SHIFT 1Medium

Junction Transistor · Current relations

In an n-p-n transistor amplifier, the collector current is 8 mA. If 80%80\% of the electrons from the emitter reach the collector, then ( α\alpha and β\beta are current ratios)

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Answer: (c)

  1. α=ICIE=0.8⇒IE=80.8=10\alpha = \dfrac{I_C}{I_E} = 0.8 \Rightarrow I_E = \dfrac{8}{0.8} = 10 mA.
  2. IB=10−8=2I_B = 10 - 8 = 2 mA.
  3. β=ICIB=82=4\beta = \dfrac{I_C}{I_B} = \dfrac{8}{2} = 4
  4. So the answer is (c) α=0.8,β=4.0\alpha = 0.8, \beta = 4.0.
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Q366MHT CET 2025 · 20 APR · SHIFT 2Medium

Junction Transistor · Current relations

In an n-p-n transistor amplifier, the collector current is 9 mA. If 90%90\% of the electrons emitted reach the collector, then

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Answer: (c)

  1. α=0.9⇒IE=90.9=10\alpha = 0.9 \Rightarrow I_E = \dfrac{9}{0.9} = 10 mA, IB=10−9=1I_B = 10 - 9 = 1 mA.
  2. β=91=9\beta = \dfrac{9}{1} = 9 (check: β=α1−α=0.90.1=9\beta = \dfrac{\alpha}{1-\alpha} = \dfrac{0.9}{0.1} = 9).
  3. So the answer is (c) α=0.9,β=9\alpha = 0.9, \beta = 9.
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Q367MHT CET 2025 · 26 APR · SHIFT 1Medium

Junction Transistor · CE amplifier gains

In a common emitter transistor amplifier circuit, the input resistance is 1.8 kΩ1.8\text{ k}\Omega and output is obtained across a load resistance of 9 kΩ9\text{ k}\Omega. The alternating current gain is 70. Corresponding to an a.c. input voltage of 6 mV, the output voltage will be

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Answer: (c)

  1. AV=βRLRi=70×91.8=350A_V = \beta \dfrac{R_L}{R_i} = 70 \times \dfrac{9}{1.8} = 350
  2. Vo=AVVi=350×6×10−3=2.1V_o = A_V V_i = 350 \times 6 \times 10^{-3} = 2.1 V
  3. So the answer is (c) 2.1 V.
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Q368MHT CET 2025 · 25 APR · SHIFT 2Medium

Junction Transistor · CE amplifier gains

In a common emitter amplifier configuration, the current gain is 62. The collector resistance and input resistance are 5 kΩ5\text{ k}\Omega and 500 Ω500\ \Omega respectively. If the input voltage is 0.01 V, the output voltage will be

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Answer: (b)

  1. AV=βRCRi=62×5000500=620A_V = \beta \dfrac{R_C}{R_i} = 62 \times \dfrac{5000}{500} = 620
  2. Vo=AVVi=620×0.01=6.2V_o = A_V V_i = 620 \times 0.01 = 6.2 V
  3. So the answer is (b) 6.2 V.
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Q369MHT CET 2025 · 20 APR · SHIFT 1Medium

Junction Transistor · CE amplifier gains

In a transistor (common emitter configuration) the ratio of power gain to voltage gain is ( α\alpha and β\beta are current ratios)

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Answer: (d)

  1. Power gain =PoPi=ICVoIBVi=β×AV= \dfrac{P_o}{P_i} = \dfrac{I_C V_o}{I_B V_i} = \beta \times A_V
  2. So power gainvoltage gain=β\dfrac{\text{power gain}}{\text{voltage gain}} = \beta.
  3. So the answer is (d) β\beta.
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Q370MHT CET 2024 · 3 MAY · SHIFT 1Easy

Junction Transistor · Structure & biasing

An n-p-n transistor can be considered to be equivalent to two diodes connected. The correct figure out of the following is

Figure

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Answer: (b)

  1. n-p-n: emitter n, base p, collector n. The p base is the anode of both junction diodes.
  2. So both diode arrows point away from B, toward E and toward C.
  3. Figure (b) shows this arrangement.
  4. So the answer is (b).
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Q371MHT CET 2024 · 15 MAY · SHIFT 1Easy

Junction Transistor · Current relations

For a transistor, current gain (β)=50(\beta) = 50. To change the collector current by 350 μA350\,\mu\text{A}, the base current should be changed by

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Answer: (d)

  1. β=ΔICΔIB⇒ΔIB=ΔICβ\beta = \dfrac{\Delta I_C}{\Delta I_B} \Rightarrow \Delta I_B = \dfrac{\Delta I_C}{\beta}
  2. ΔIB=35050=7 μ\Delta I_B = \dfrac{350}{50} = 7\,\muA
  3. So the answer is (d) (35050)μ\left(\frac{350}{50}\right)\muA.
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Q372MHT CET 2024 · 16 MAY · SHIFT 1Easy

Junction Transistor · CE amplifier gains

The input signal given to C.E. amplifier having a voltage gain of 126 is Vi=2cos⁡(12t+π3)V_i = 2\cos\left(12t + \frac{\pi}{3}\right). The corresponding output signal will be

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Answer: (a)

  1. CE amplifier: amplitude multiplied by AVA_V and phase shifted by π\pi.
  2. Amplitude =126×2=252= 126 \times 2 = 252
  3. Phase =π3+π=4π3= \frac{\pi}{3} + \pi = \frac{4\pi}{3}
  4. So the answer is (a) 252cos⁡(12t+4π3)252\cos\left(12t + \frac{4\pi}{3}\right).
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Q373MHT CET 2024 · 11 MAY · SHIFT 2Easy

Junction Transistor · CE amplifier gains

When n-p-n junction transistor is used as an amplifier in common emitter mode,

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Answer: (c)

  1. (a) False: CE input impedance is low, output impedance is high.
  2. (b) False: base-emitter junction is forward biased.
  3. (c) True: input between base and emitter, output between collector and emitter.
  4. (d) False: output is 180∘180^\circ out of phase.
  5. So the answer is (c).
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Q374MHT CET 2024 · 3 MAY · SHIFT 1Easy

Junction Transistor · CE amplifier gains

In common emitter transistor amplifier, load resistance is 6.5 kΩ6.5\text{ k}\Omega and an input resistance is 1.3 kΩ1.3\text{ k}\Omega. If the current gain is 78, the voltage gain is

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Answer: (b)

  1. AV=βRLRiA_V = \beta\frac{R_L}{R_i}
  2. AV=78×6.51.3=78×5=390A_V = 78 \times \frac{6.5}{1.3} = 78 \times 5 = 390
  3. So the answer is (b) 390.
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Q375MHT CET 2024 · 4 MAY · SHIFT 1Medium

Junction Transistor · Current relations

The collector supply voltage is 6 V and a voltage drop across a resistor of 600 Ω600\ \Omega in the collector circuit is 0.6 V, in a circuit of transistor connected in common emitter mode. If the current gain is 20 then the base current is

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Answer: (b)

  1. Collector current IC=VRR=0.6600=1×10−3I_C = \dfrac{V_R}{R} = \dfrac{0.6}{600} = 1 \times 10^{-3} A =1= 1 mA.
  2. IB=ICβ=120=0.05I_B = \dfrac{I_C}{\beta} = \dfrac{1}{20} = 0.05 mA.
  3. So the answer is (b) 0.05 mA.
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Q376MHT CET 2024 · 2 MAY · SHIFT 1Medium

Junction Transistor · Current relations

In an NPN transistor 101010^{10} electrons enter the emitter in 10−6 s10^{-6}\text{ s} and 2%2\% electrons recombine with holes in base. The current ratios ' α\alpha ' and ' β\beta ' of a transistor are respectively (nearly)

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Answer: (a)

  1. 2%2\% of electrons recombine in the base, so 98%98\% reach the collector: α=ICIE=0.98\alpha = \dfrac{I_C}{I_E} = 0.98.
  2. β=α1−α=0.980.02=49\beta = \dfrac{\alpha}{1-\alpha} = \dfrac{0.98}{0.02} = 49
  3. So the answer is (a) 0.98,490.98, 49.
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Q377MHT CET 2024 · 9 MAY · SHIFT 1Medium

Junction Transistor · CE amplifier gains

The current amplification factor of a transistor is 50. The input resistance when used in common emitter mode is 1 kΩ1\text{ k}\Omega. The peak value for an a.c. input voltage of 0.01 V peak is

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Answer: (d)

  1. Peak base current IB=ViRi=0.011000=10 μI_B = \dfrac{V_i}{R_i} = \dfrac{0.01}{1000} = 10\ \muA.
  2. Peak collector current IC=βIB=50×10=500 μI_C = \beta I_B = 50 \times 10 = 500\ \muA.
  3. So the answer is (d) 500 μ500\ \muA.
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Q378JEE Main 2023 · 31 JAN · SHIFT 2EasyOld syllabus

Junction Transistor · Structure & biasing

Given below are two statements:

Statement I: In a typical transistor, all three regions emitter, base and collector have same doping level.

Statement II: In a transistor, collector is the thickest and base is the thinnest segment. In the light of the above statements, choose the most appropriate answer from the options given below.

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Answer: (c)

  1. Statement I: doping differs; emitter is heavily doped, base lightly, collector moderately. So I is incorrect.
  2. Statement II: collector is the largest (to remove heat) and base is the thinnest. So II is correct.
  3. So the answer is (c) Statement I is incorrect but Statement II is correct.
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Q379MHT CET 2023 · 14 MAY · SHIFT 1Easy

Junction Transistor · Current relations

For a common emitter configuration, if 'α\alpha' and 'β\beta' have their usual meanings, the incorrect relation between 'α\alpha' and 'β\beta' is

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Answer: (b)

  1. Correct relations: α=β1+β\alpha = \dfrac{\beta}{1+\beta} and β=α1−α\beta = \dfrac{\alpha}{1-\alpha}.
  2. Taking reciprocals of α=β1+β\alpha = \dfrac{\beta}{1+\beta}: 1α=1β+1\dfrac{1}{\alpha} = \dfrac{1}{\beta} + 1, which also gives 1β=1α−1\dfrac{1}{\beta} = \dfrac{1}{\alpha} - 1. So (a), (c), (d) are correct.
  3. α=β1−β\alpha = \dfrac{\beta}{1-\beta} does not follow; it would make α<0\alpha < 0 for β>1\beta > 1.
  4. So the answer is (b).
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Q380MHT CET 2023 · 11 MAY · SHIFT 2Easy

Junction Transistor · Current relations

In the study of transistor as an amplifier if α=ICIE=0.98\alpha = \frac{I_C}{I_E} = 0.98 and β=ICIB=49\beta = \frac{I_C}{I_B} = 49, where IC,IBI_C, I_B and IE\text{I}_\text{E} are collector, base and emitter current respectively then (1α−1β)\left(\frac{1}{\alpha} - \frac{1}{\beta}\right) is equal to

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Answer: (d)

  1. IE=IB+ICI_E = I_B + I_C. Divide by ICI_C: 1α=1β+1\dfrac{1}{\alpha} = \dfrac{1}{\beta} + 1.
  2. So 1α−1β=1\dfrac{1}{\alpha} - \dfrac{1}{\beta} = 1.
  3. Check: 10.98−149=1.0204−0.0204=1\dfrac{1}{0.98} - \dfrac{1}{49} = 1.0204 - 0.0204 = 1
  4. So the answer is (d) 1.
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Q381JEE Main 2023 · 12 APR · SHIFT 1EasyOld syllabus

Junction Transistor · Current relations

In an n-p-n common emitter (CE) transistor the collector current changes from 5 mA\text{mA} to 16 mA16\text{ mA} for the change in base current from 100 μA100\,\mu\text{A} and 200 μA200\,\mu\text{A}, respectively. The current gain of transistor is __________.

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Answer: (d)

  1. β=ΔICΔIB\beta = \frac{\Delta I_C}{\Delta I_B}
  2. ΔIC=16−5=11\Delta I_C = 16 - 5 = 11 mA, ΔIB=100 μ\Delta I_B = 100\,\muA =0.1= 0.1 mA
  3. β=11/0.1=110\beta = 11/0.1 = 110
  4. So the answer is (d) 110.
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Q382MHT CET 2023 · 9 MAY · SHIFT 2Easy

Junction Transistor · CE amplifier gains

In a transistor, in common emitter configuration, the ratio of power gain to voltage gain is

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Answer: (d)

  1. AV=βRLriA_V = \beta\frac{R_L}{r_i} and AP=β2RLriA_P = \beta^2\frac{R_L}{r_i}
  2. APAV=β\frac{A_P}{A_V} = \beta
  3. So the answer is (d) β\beta.
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Q383MHT CET 2023 · 10 MAY · SHIFT 2Medium

Junction Transistor · Structure & biasing

Which one of the operations of n−p−n\mathrm{n}-\mathrm{p}-\mathrm{n} transistor differs from that of p−n−pp-n-p transistor?

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Answer: (c)

  1. In both transistors the emitter-base junction is forward biased and the emitter injects majority carriers of the emitter, which are minority carriers in the base.
  2. p-n-p: p-type emitter injects holes into the n-type base.
  3. n-p-n: n-type emitter injects electrons into the p-type base.
  4. So the answer is (c).
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Q384NEET 2023MediumOld syllabus

Junction Transistor · Structure & biasing

Figure

The above figure shows the circuit symbol of a transistor. Select the correct statements given below:

(A) The transistor has two segments of p-type semiconductor separated by a segment of n-type semiconductor.

(B) The emitter is of moderate size and heavily doped.

(C) The central segment is thin and lightly doped.

(D) The emitter base junction is reverse biased in common emitter amplifier circuit.

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Answer: (d)

  1. The arrow on the emitter points outward, so the symbol is of an n-p-n transistor.
  2. (A) False: two p-regions separated by n is a p-n-p transistor.
  3. (B) True: emitter is of moderate size and heavily doped.
  4. (C) True: base is very thin and lightly doped.
  5. (D) False: in a CE amplifier the emitter-base junction is forward biased.
  6. So the answer is (d) (B) and (C).
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Q385MHT CET 2023 · 14 MAY · SHIFT 2Medium

Junction Transistor · Current relations

In an n-p-n transistor, the collector current is 28 mA28\text{ mA}. If 80%80\% of electrons reach the collector, its base current in mA\text{mA} is

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Answer: (d)

  1. IE=IC0.8=280.8=35I_E = \dfrac{I_C}{0.8} = \dfrac{28}{0.8} = 35 mA.
  2. IB=IE−IC=35−28=7I_B = I_E - I_C = 35 - 28 = 7 mA.
  3. So the answer is (d) 7.
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Q386JEE Main 2023 · 8 APR · SHIFT 2MediumOld syllabus

Junction Transistor · CE amplifier gains

For a given transistor amplifier circuit in CE\text{CE} configuration VCC=1 V,RC=1 kΩ,Rb=100 kΩ\mathrm{V}_{\mathrm{CC}} = 1\text{ V}, \mathrm{R}_{\mathrm{C}} = 1\text{ k}\Omega, \mathrm{R}_{\mathrm{b}} = 100\text{ k}\Omega and β=100\beta = 100. Value of base current Ib\mathrm{I}_{\mathrm{b}} is

Figure

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Answer: (d)

  1. Maximum (saturation) collector current: IC=VCCRC=1 V1 kΩ=1 mAI_C = \dfrac{V_{CC}}{R_C} = \dfrac{1\ \text{V}}{1\ \text{k}\Omega} = 1\ \text{mA}
  2. Base current: Ib=ICβ=1 mA100=10 μAI_b = \dfrac{I_C}{\beta} = \dfrac{1\ \text{mA}}{100} = 10\ \mu\text{A}
  3. So the answer is (d) Ib=10 μAI_b = 10\ \mu\text{A}.
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Q387JEE Main 2023 · 13 APR · SHIFT 1MediumOld syllabus

Junction Transistor · Characteristics & transistor testing

From the given transfer characteristic of a transistor in CE\text{CE} configuration, the value of power gain of this configuration is 10x10^{x}, for RB=10 kΩ\mathrm{R}_{\mathrm{B}} = 10\text{ k}\Omega, and RC=1 kΩ\mathrm{R}_{\mathrm{C}} = 1\text{ k}\Omega. The value of xx is __________.

Figure

Numerical answer type. Work it out, then open the answer.

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Answer: 3

  1. From the graph: β=ΔICΔIB=(20−10) mA(200−100) μA=100\beta = \dfrac{\Delta I_C}{\Delta I_B} = \dfrac{(20 - 10)\ \text{mA}}{(200 - 100)\ \mu\text{A}} = 100
  2. Power gain: Ap=β2RCRB=104×1 kΩ10 kΩ=103A_p = \beta^2 \dfrac{R_C}{R_B} = 10^4 \times \dfrac{1\ \text{k}\Omega}{10\ \text{k}\Omega} = 10^3
  3. So x=3x = 3.
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Q388JEE Main 2022 · 27 JUL · SHIFT 2EasyOld syllabus

Junction Transistor · Current relations

For a constant collector-emitter voltage of 8 V8\text{ V}, the collector current of a transistor reached to the value of 6 mA6\text{ mA} from 4 mA4\text{ mA}, whereas base current changed from 20 μA20\,\mu\text{A} to 25 μA25\,\mu\text{A} value. If transistor is in active state, small signal current gain (current amplification factor) will be:

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Answer: (b)

  1. β=ΔICΔIB\beta = \frac{\Delta I_C}{\Delta I_B} at constant VCEV_{CE}
  2. ΔIC=2\Delta I_C = 2 mA =2000 μ= 2000\,\muA, ΔIB=5 μ\Delta I_B = 5\,\muA
  3. β=2000/5=400\beta = 2000/5 = 400
  4. So the answer is (b) 400.
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Q389JEE Main 2022 · 27 JUN · SHIFT 2EasyOld syllabus

Junction Transistor · Switch & oscillator

For a transistor to act as a switch, it must be operated in

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Answer: (d)

  1. As a switch the transistor must be either fully OFF or fully ON.
  2. OFF = cut-off state (IC≈0I_C \approx 0), ON = saturation state (VCE≈0V_{CE} \approx 0). The active region is for amplifiers.
  3. So the answer is (d) Saturation and cut-off state.
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Q390JEE Main 2022 · 26 JUN · SHIFT 2EasyOld syllabus

Junction Transistor · Switch & oscillator

The positive feedback is required by an amplifier to act an oscillator. The feedback here means:

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Answer: (b)

  1. In feedback, part of the output is fed back to the input circuit; positive feedback means it is in phase with the input.
  2. This replaces losses so oscillations continue without any external input.
  3. So the answer is (b) A portion of the output power is returned back to the input.
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Q391JEE Main 2022 · 28 JUN · SHIFT 1MediumOld syllabus

Junction Transistor · Structure & biasing

Given below are two statements: One is labelled as Assertion A and the other is labelled as Reason R.

Assertion A: n-p-n transistor permits more current than a p-n-p transistor.

Reason R: Electrons have greater mobility as a charge carrier.

Choose the correct answer from the options given below:

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Answer: (a)

  1. In n-p-n the main charge carriers are electrons; in p-n-p they are holes.
  2. Electron mobility is greater than hole mobility, so for the same conditions n-p-n gives a larger current.
  3. Both A and R are true and R explains A, so the answer is (a).
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Q392NEET 2022 · PHASE 2MediumOld syllabus

Junction Transistor · CE amplifier gains

The collector current in a common base amplifier using n-p-n transistor is 24 mA. If 80% of the electrons released by the emitter is accepted by the collector, then the base current is numerically:

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Answer: (d)

  1. IC=0.8 IE⇒IE=240.8=30I_C = 0.8\,I_E \Rightarrow I_E = \dfrac{24}{0.8} = 30 mA.
  2. IB=IE−IC=30−24=6I_B = I_E - I_C = 30 - 24 = 6 mA.
  3. In n-p-n, conventional current enters at the base and collector and leaves at the emitter, so IBI_B enters the base.
  4. So the answer is (d) 6 mA and entering the base.
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Q393JEE Main 2022 · 28 JUL · SHIFT 2MediumOld syllabus

Junction Transistor · CE amplifier gains

An n.p.n transistor with current gain β=100\beta = 100 in common emitter configuration is shown in figure. The output voltage of the amplifier will be

Figure

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Answer: (b)

  1. Voltage gain of CE amplifier: Av=βRLRinA_v = \beta \dfrac{R_L}{R_{in}}
  2. Av=100×10 kΩ1 kΩ=1000A_v = 100 \times \dfrac{10\ \text{k}\Omega}{1\ \text{k}\Omega} = 1000
  3. Vout=AvVin=1000×1 mV=1 VV_{out} = A_v V_{in} = 1000 \times 1\ \text{mV} = 1\ \text{V}
  4. So the answer is (b) 1.0 V.
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Q394JEE Main 2022 · 29 JUN · SHIFT 1MediumOld syllabus

Junction Transistor · CE amplifier gains

A transistor is used in an amplifier circuit in common emitter mode. If the base current changes by 100 μ\muA, it brings a change of 10 mA in collector current. If the load resistance is 2 kΩ\Omega and input resistance is 1 kΩ\Omega, the value of power gain is x ×\times 104. The value of x is _____________.

Numerical answer type. Work it out, then open the answer.

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Answer: 2

  1. Current gain: β=ΔICΔIB=10 mA100 μA=100\beta = \dfrac{\Delta I_C}{\Delta I_B} = \dfrac{10\ \text{mA}}{100\ \mu\text{A}} = 100
  2. Power gain: Ap=β2RLRi=104×2 kΩ1 kΩ=2×104A_p = \beta^2 \dfrac{R_L}{R_i} = 10^4 \times \dfrac{2\ \text{k}\Omega}{1\ \text{k}\Omega} = 2 \times 10^4
  3. So x=2x = 2.
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Q395JEE Main 2022 · 24 JUN · SHIFT 1MediumOld syllabus

Junction Transistor · CE amplifier gains

A transistor is used in common-emitter mode in an amplifier circuit. When a signal of 10 mV is added to the base-emitter voltage, the base current changes by 10 μ\muA and the collector current changes by 1.5 mA. The load resistance is 5 kΩ\Omega. The voltage gain of the transistor will be _________.

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 750

  1. Output voltage change: ΔVo=ΔICRL=1.5 mA×5 kΩ=7.5 V\Delta V_o = \Delta I_C R_L = 1.5\ \text{mA} \times 5\ \text{k}\Omega = 7.5\ \text{V}
  2. Voltage gain: Av=ΔVoΔVi=7.5 V10 mV=750A_v = \dfrac{\Delta V_o}{\Delta V_i} = \dfrac{7.5\ \text{V}}{10\ \text{mV}} = 750
  3. So the voltage gain is 750.
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Q396JEE Main 2022 · 26 JUL · SHIFT 2MediumOld syllabus

Junction Transistor · Characteristics & transistor testing

The typical transfer characteristics of a transistor in CE configuration is shown in figure. A load resistor of 2 kΩ2\text{ k}\Omega is connected in the collector branch of the circuit used. The input resistance of the transistor is 0.50 kΩ0.50\text{ k}\Omega. The voltage gain of the transistor is ______________.

Figure

Numerical answer type. Work it out, then open the answer.

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Answer: 200

  1. From the graph: β=ΔICΔIB=5 mA100 μA=50\beta = \dfrac{\Delta I_C}{\Delta I_B} = \dfrac{5\ \text{mA}}{100\ \mu\text{A}} = 50
  2. Voltage gain: Av=βRLRi=50×2 kΩ0.5 kΩ=200A_v = \beta \dfrac{R_L}{R_i} = 50 \times \dfrac{2\ \text{k}\Omega}{0.5\ \text{k}\Omega} = 200
  3. So the voltage gain is 200.
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Q397JEE Main 2022 · 25 JUN · SHIFT 2MediumOld syllabus

Junction Transistor · Characteristics & transistor testing

In an experiment of CE configuration of n-p-n transistor, the transfer characteristics are observed as given in figure.

Figure

If the input resistance is 200 Ω\Omega and output resistance is 60 Ω\Omega, the voltage gain in this experiment will be ____________.

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 15

  1. From the graph: β=ΔICΔIB=5 mA100 μA=50\beta = \dfrac{\Delta I_C}{\Delta I_B} = \dfrac{5\ \text{mA}}{100\ \mu\text{A}} = 50
  2. Voltage gain: Av=βRoRi=50×60200=15A_v = \beta \dfrac{R_o}{R_i} = 50 \times \dfrac{60}{200} = 15
  3. So the voltage gain is 15.
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Q398MHT CET 2021 · 24 SEP · SHIFT 2Easy

Junction Transistor · Current relations

For a transistor, the current ratio αdc=6970\alpha_\text{dc} = \frac{69}{70}, the current gain βdc\beta_\text{dc} is

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Answer: (b)

  1. β=α1−α\beta = \dfrac{\alpha}{1 - \alpha}
  2. β=69/701/70=69\beta = \dfrac{69/70}{1/70} = 69
  3. So the answer is (b) 69.
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Q399MHT CET 2021 · 21 SEP · SHIFT 1Easy

Junction Transistor · Current relations

For a transistor, 1αDC−1βDC\frac{1}{\alpha_\text{DC}} - \frac{1}{\beta_\text{DC}} is equal to [ αDC\alpha_\text{DC} and βDC\beta_\text{DC} are current amplification factors]

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Answer: (d)

  1. α=β1+β⇒1α=1+ββ=1β+1\alpha = \frac{\beta}{1+\beta} \Rightarrow \frac{1}{\alpha} = \frac{1+\beta}{\beta} = \frac{1}{\beta} + 1
  2. 1α−1β=1\frac{1}{\alpha} - \frac{1}{\beta} = 1
  3. So the answer is (d) one.
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Q400JEE Main 2021 · 27 AUG · SHIFT 2EasyOld syllabus

Junction Transistor · Current relations

For a transistor α\alpha and β\beta are given as α=ICIE\alpha = \frac{I_C}{I_E} and β=ICIB\beta = \frac{I_C}{I_B}. Then the correct relation between α\alpha and β\beta will be:

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Answer: (b)

  1. IE=IB+IC⇒IB=IE−ICI_E = I_B + I_C \Rightarrow I_B = I_E - I_C
  2. β=ICIE−IC=α1−α\beta = \frac{I_C}{I_E - I_C} = \frac{\alpha}{1-\alpha}
  3. So the answer is (b).
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Q401JEE Main 2021 · 18 MAR · SHIFT 2EasyOld syllabus

Junction Transistor · Current relations

The correct relation between α\alpha (ratio of collector current to emitter current) and β\beta (ratio of collector current to base current) of a transistor is:

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Answer: (c)

  1. IE=IB+ICI_E = I_B + I_C; divide by ICI_C: 1α=1β+1\frac{1}{\alpha} = \frac{1}{\beta} + 1
  2. α=β1+β\alpha = \frac{\beta}{1+\beta}
  3. So the answer is (c).
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Q402JEE Main 2021 · 24 FEB · SHIFT 1EasyOld syllabus

Junction Transistor · Current relations

If an emitter current is changed by 4 mA, the collector current changes by 3.5 mA. The value of β\beta will be:

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Answer: (d)

  1. ΔIB=ΔIE−ΔIC=4−3.5=0.5\Delta I_B = \Delta I_E - \Delta I_C = 4 - 3.5 = 0.5 mA
  2. β=ΔICΔIB=3.50.5=7\beta = \frac{\Delta I_C}{\Delta I_B} = \frac{3.5}{0.5} = 7
  3. So the answer is (d) 7.
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Q403MHT CET 2021 · 22 SEP · SHIFT 2Easy

Junction Transistor · CE amplifier gains

For a common-emitter amplifier, the voltage gain is 40. Its input and output impedances are 100 Ω100\ \Omega and 400 Ω400\ \Omega, respectively. The power gain of the CE amplifier will be

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Answer: (b)

  1. AV=βRoRi⇒β=40×100400=10A_V = \beta\frac{R_o}{R_i} \Rightarrow \beta = \frac{40 \times 100}{400} = 10
  2. AP=βAV=10×40=400A_P = \beta A_V = 10 \times 40 = 400
  3. So the answer is (b) 400.
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Q404JEE Main 2021 · 27 AUG · SHIFT 1EasyOld syllabus

Junction Transistor · CE amplifier gains

For a transistor in CE mode to be used as an amplifier, it must be operated in:

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Answer: (d)

  1. Cut-off and saturation are used for switching (OFF/ON).
  2. Linear amplification needs IC=βIBI_C = \beta I_B, which holds only in the active region.
  3. So the answer is (d).
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Q405JEE Main 2021 · 24 FEB · SHIFT 2MediumOld syllabus

Junction Transistor · Structure & biasing

Given below are two statements:

Statement I: PN junction diodes can be used to function as transistor, simply by connecting two diodes, back to back, which acts as the base terminal.

Statement II: In the study of transistor, the amplification factor β\beta indicates ratio of the collector current to the base current.

In the light of the above statements, choose the correct answer from the options given below.

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Answer: (b)

  1. Statement I: false. A transistor needs a very thin, lightly doped base; two separate diodes joined back to back have a thick common region, so carriers cannot pass through and there is no transistor action.
  2. Statement II: true. β=ICIB\beta = \dfrac{I_C}{I_B}.
  3. So the answer is (b).
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Q406MHT CET 2021 · 23 SEP · SHIFT 2Medium

Junction Transistor · Current relations

In a CE transistor, a change of 8.0 mA8.0\text{ mA} in the emitter current produces a change of 7.8 mA7.8\text{ mA} in the collector current. What change in the base current is necessary to produce the same change in the collector current?

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Answer: (a)

  1. IE=IB+IC⇒ΔIB=ΔIE−ΔICI_E = I_B + I_C \Rightarrow \Delta I_B = \Delta I_E - \Delta I_C
  2. ΔIB=8.0−7.8=0.2\Delta I_B = 8.0 - 7.8 = 0.2 mA =200 μ= 200\ \muA.
  3. So the answer is (a) 200 μ200\ \muA.
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Q407JEE Main 2021 · 27 JUL · SHIFT 1MediumOld syllabus

Junction Transistor · Current relations

A transistor is connected in common emitter circuit configuration, the collector supply voltage is 10 V and the voltage drop across a resistor of 1000 Ω\Omega in the collector circuit is 0.6 V. If the current gain factor (β\beta) is 24, then the base current is _____________ μ\muA. (Round off to the Nearest Integer)

Numerical answer type. Work it out, then open the answer.

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Answer: 25

  1. IC=VRR=0.61000=0.6I_C = \dfrac{V_R}{R} = \dfrac{0.6}{1000} = 0.6 mA.
  2. IB=ICβ=0.6×10−324=25×10−6I_B = \dfrac{I_C}{\beta} = \dfrac{0.6 \times 10^{-3}}{24} = 25 \times 10^{-6} A.
  3. So the base current is 25 μ25\ \muA.
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Q408MHT CET 2021 · 23 SEP · SHIFT 1Medium

Junction Transistor · CE amplifier gains

In common emitter amplifier, a change of 0.2 mA in the base current causes a change of 5 mA in the collector current. If input resistance is 2 kΩ\Omega and voltage gain is 75, the load resistance used in the circuit is

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Answer: (d)

  1. β=ΔICΔIB=50.2=25\beta = \dfrac{\Delta I_C}{\Delta I_B} = \dfrac{5}{0.2} = 25
  2. AV=βRLRi⇒75=25×RL2 kΩA_V = \beta \dfrac{R_L}{R_i} \Rightarrow 75 = 25 \times \dfrac{R_L}{2\text{ k}\Omega}
  3. RL=6R_L = 6 kΩ\Omega
  4. So the answer is (d) 6 kΩ\Omega.
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Q409JEE Main 2021 · 18 MAR · SHIFT 1MediumOld syllabus

Junction Transistor · CE amplifier gains

An npn transistor operates as a common emitter amplifier with a power gain of 106. The input circuit resistance is 100Ω\Omega and the output load resistance is 10 KΩ\Omega. The common emitter current gain 'β\beta' will be ________. (Round off to the Nearest Integer).

Numerical answer type. Work it out, then open the answer.

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Answer: 100

  1. Power gain of CE amplifier: Ap=β2RoRiA_p = \beta^2 \dfrac{R_o}{R_i}
  2. 106=β2×104100=100 β210^6 = \beta^2 \times \dfrac{10^4}{100} = 100\,\beta^2
  3. β2=104⇒β=100\beta^2 = 10^4 \Rightarrow \beta = 100
  4. So β=100\beta = 100.
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Q410JEE Main 2021 · 18 MAR · SHIFT 2MediumOld syllabus

Junction Transistor · Characteristics & transistor testing

The typical output characteristics curve for a transistor working in the common-emitter configuration is shown in the figure.

Figure

The estimated current gain from the figure is __________.

Numerical answer type. Work it out, then open the answer.

Show answer and solution

Answer: 200

  1. Current gain from output characteristics: β=ΔICΔIB\beta = \dfrac{\Delta I_C}{\Delta I_B} at constant VCEV_{CE}.
  2. Adjacent curves: ΔIB=10 μA\Delta I_B = 10\ \mu\text{A} gives ΔIC=2 mA\Delta I_C = 2\ \text{mA}.
  3. β=2×10−310×10−6=200\beta = \dfrac{2 \times 10^{-3}}{10 \times 10^{-6}} = 200
  4. So the current gain is 200.
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Q411MHT CET 2021 · 22 SEP · SHIFT 1Difficult

Junction Transistor · Current relations

In an n-p-n transistor 200 electrons enter the emitter in 10 −8^{-8} second. If 1% electrons are lost in the base, then the current that enters the emitter and the current amplification factor are respectively [e = 1.6 ×\times 10 −19^{-19} C]

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Answer: (b)

  1. Emitter current: IE=net=200×1.6×10−1910−8=3.2×10−9 AI_E = \dfrac{ne}{t} = \dfrac{200 \times 1.6 \times 10^{-19}}{10^{-8}} = 3.2 \times 10^{-9}\ \text{A}
  2. 1% lost in base, so α=ICIE=0.99\alpha = \dfrac{I_C}{I_E} = 0.99
  3. β=α1−α=0.990.01=99\beta = \dfrac{\alpha}{1 - \alpha} = \dfrac{0.99}{0.01} = 99
  4. So the answer is (b) 3.2×10−93.2 \times 10^{-9} A and 99.
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Q412JEE Main 2021 · 27 AUG · SHIFT 1DifficultOld syllabus

Junction Transistor · CE amplifier gains

A circuit is arranged as shown in figure. The output voltage V0 is equal to ................... V.

Figure

Numerical answer type. Work it out, then open the answer.

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Answer: 5

  1. Diodes D1D_1, D2D_2 have anodes at the base-side node and cathodes at ground, and the 5 V cell drives current into that node through RR, so both diodes are forward biased.
  2. The node is clamped to about 0 V (ideal diodes), so the base gets no forward bias and the transistor is cut off.
  3. With IC=0I_C = 0 there is no drop across the collector resistor: V0=5−ICR=5 VV_0 = 5 - I_C R = 5\ \text{V}
  4. So V0=5V_0 = 5 V.
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Q413NEET 2020 · PHASE 1EasyOld syllabus

Junction Transistor · Structure & biasing

For transistor action, which of the following statements is correct?

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Answer: (c)

  1. (a) and (d) are wrong: the three regions differ in size and doping (emitter heavy, base light, collector moderate and largest).
  2. (b) is wrong: for transistor action the emitter junction is forward biased and the collector junction is reverse biased.
  3. (c) is right: a thin, lightly doped base lets most carriers reach the collector.
  4. So the answer is (c).
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Q414MHT CET 2020 · 19 OCT · SHIFT 2Easy

Junction Transistor · Current relations

A transistor having α=0.8\alpha = 0.8 is connected in common emitter configuration. When the base current changes by 6 mA, then the change in collector current is

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Answer: (b)

  1. β=α1−α=0.80.2=4\beta = \frac{\alpha}{1-\alpha} = \frac{0.8}{0.2} = 4
  2. ΔIC=β ΔIB=4×6=24\Delta I_C = \beta\,\Delta I_B = 4 \times 6 = 24 mA
  3. So the answer is (b) 24 mA.
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Q415MHT CET 2020 · 16 OCT · SHIFT 1Medium

Junction Transistor · CE amplifier gains

In common emitter amplifier, input resistance is 1000 Ω1000\ \Omega, peak value of input signal voltage is 5 mV5\text{ mV} and β=60\beta = 60. The peak value of output current is

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Answer: (a)

  1. Peak input (base) current IB=ViRi=5×10−31000=5×10−6I_B = \dfrac{V_i}{R_i} = \dfrac{5 \times 10^{-3}}{1000} = 5 \times 10^{-6} A.
  2. Peak output (collector) current IC=βIB=60×5×10−6=3×10−4I_C = \beta I_B = 60 \times 5 \times 10^{-6} = 3 \times 10^{-4} A.
  3. So the answer is (a) 3×10−43 \times 10^{-4} A.
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Q416NEET 2020 · PHASE 2Medium

Junction Transistor · CE amplifier gains

A n-p-n transistor is connected in common emitter configuration (see figure) in which collector voltage drop across load resistance (800 Ω)(800\ \Omega) connected to the collector circuit is 0.8 V0.8\text{ V}. The collector current is

Figure

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Answer: (d)

  1. The voltage drop across the collector load is V=ICRLV = I_C R_L.
  2. IC=0.8800=1×10−3I_C = \dfrac{0.8}{800} = 1 \times 10^{-3} A =1= 1 mA.
  3. So the answer is (d) 11 mA.
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Q417JEE Main 2020 · 6 SEP · SHIFT 2MediumOld syllabus

Junction Transistor · Characteristics & transistor testing

The output characteristics of a transistor is shown in the figure.

When VCE is 10V and IC = 4.0 mA, then value of β\betaac is __________.

Figure

Numerical answer type. Work it out, then open the answer.

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Answer: 150

  1. At VCE=10V_{CE} = 10 V, IC=4I_C = 4 mA lies between the IB=20 μAI_B = 20\ \mu\text{A} and 30 μA30\ \mu\text{A} curves.
  2. Reading the graph: IC≈3.0I_C \approx 3.0 mA at 20 μA20\ \mu\text{A} and ≈4.5\approx 4.5 mA at 30 μA30\ \mu\text{A}, so ΔIC≈1.5\Delta I_C \approx 1.5 mA.
  3. βac=ΔICΔIB=1.5 mA10 μA=150\beta_{ac} = \dfrac{\Delta I_C}{\Delta I_B} = \dfrac{1.5\ \text{mA}}{10\ \mu\text{A}} = 150
  4. So βac=150\beta_{ac} = 150.
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Q418MHT CET 2020 · 16 OCT · SHIFT 2Medium

Junction Transistor · Switch & oscillator

AA transistor has a voltage gain AA. If the amount βA\beta A of its output is applied to the input of the transistor, then the transistor becomes oscillator, when

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Answer: (b)

  1. Barkhausen criterion: sustained oscillations need loop gain βA=1\beta A = 1 (positive feedback, zero net phase shift).
  2. So the answer is (b) βA=1\beta A = 1.
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Q419MHT CET 2019 · 3 MAY · SHIFT 1Easy

Junction Transistor · Structure & biasing

Which of the following regions of a transistors are, respectively, heavily dopped and lightly dopped?

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Answer: (c)

  1. Emitter is heavily doped to inject a large number of carriers.
  2. Base is lightly doped and thin so most carriers pass to the collector.
  3. So the answer is (c) emitter and base.
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Q420MHT CET 2019 · 2 MAY · SHIFT 2Easy

Junction Transistor · Current relations

In the study of transistor as an amplifier, the ratio of collector current to emitter current is 0.98 then the ratio of collector current to base current will be

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Answer: (b)

  1. α=IC/IE=0.98\alpha = I_C/I_E = 0.98
  2. β=α1−α=0.980.02=49\beta = \frac{\alpha}{1-\alpha} = \frac{0.98}{0.02} = 49
  3. So the answer is (b) 49.
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Q421MHT CET 2019 · 2 MAY · SHIFT 1Easy

Junction Transistor · Current relations

. For a transistor, the current ratio ' βdc\beta_{dc} ' is defined as the ratio of

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Answer: (b)

  1. By definition βdc=IC/IB\beta_{dc} = I_C/I_B (collector current to base current).
  2. So the answer is (b).
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Q422JEE Main 2019 · 10 APR · SHIFT 1MediumOld syllabus

Junction Transistor · CE amplifier gains

An n-p-n transistor operates as a common emitter amplifier, with a power gain of 60 dB. The input circuit resistance is 100Ω\Omega and the output load resistance is 10 kΩ\Omega. The common emitter current gain β\beta is:

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Answer: (b)

  1. 60 dB power gain: 10log⁡10Ap=60⇒Ap=10610\log_{10} A_p = 60 \Rightarrow A_p = 10^6
  2. For CE amplifier Ap=β2RoRi=β2×104100=100 β2A_p = \beta^2 \dfrac{R_o}{R_i} = \beta^2 \times \dfrac{10^4}{100} = 100\,\beta^2
  3. β2=104⇒β=102\beta^2 = 10^4 \Rightarrow \beta = 10^2
  4. So the answer is (b) 10210^2.
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Q423JEE Main 2019 · 9 APR · SHIFT 1MediumOld syllabus

Junction Transistor · CE amplifier gains

An NPN transistor is used in common emitter configuration as an amplifier with 1 kΩ\Omega load resistance. Signal voltage of 10 mV is applied across the base-emitter. This produces a 3 mA change in the collector current and 15μA change in the base current of the amplifier. The input resistance and voltage gain are:

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Answer: (c)

  1. Input resistance: ri=ΔVBEΔIB=10 mV15 μA=0.67 kΩr_i = \dfrac{\Delta V_{BE}}{\Delta I_B} = \dfrac{10\ \text{mV}}{15\ \mu\text{A}} = 0.67\ \text{k}\Omega
  2. Output voltage change: ΔVo=ΔICRL=3 mA×1 kΩ=3 V\Delta V_o = \Delta I_C R_L = 3\ \text{mA} \times 1\ \text{k}\Omega = 3\ \text{V}
  3. Voltage gain: Av=3 V10 mV=300A_v = \dfrac{3\ \text{V}}{10\ \text{mV}} = 300
  4. So the answer is (c) 0.67 kΩ0.67\ \text{k}\Omega, 300.
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Q424JEE Main 2019 · 12 APR · SHIFT 1MediumOld syllabus

Junction Transistor · Characteristics & transistor testing

The transfer characteristic curve of a transistor, having input and output resistance 100 Ω\Omega and 100 kΩ\Omega respectively is shown in the figure. The voltage and power gain, are respectively:

Figure

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Answer: (c)

  1. From the graph: β=ΔICΔIB=(10−5) mA(200−100) μA=50\beta = \dfrac{\Delta I_C}{\Delta I_B} = \dfrac{(10 - 5)\ \text{mA}}{(200 - 100)\ \mu\text{A}} = 50
  2. Voltage gain: Av=βRoRi=50×100 kΩ100 Ω=5×104A_v = \beta \dfrac{R_o}{R_i} = 50 \times \dfrac{100\ \text{k}\Omega}{100\ \Omega} = 5 \times 10^4
  3. Power gain: Ap=βAv=50×5×104=2.5×106A_p = \beta A_v = 50 \times 5 \times 10^4 = 2.5 \times 10^6
  4. So the answer is (c) 5×1045 \times 10^4, 2.5×1062.5 \times 10^6.
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Q425JEE Main 2019 · 12 JAN · SHIFT 2DifficultOld syllabus

Junction Transistor · Current relations

In the figure, given that VBB supply can vary from 0 to 5.0 V, VCC = 5V, β\betadc = 200, RB = 100 kΩ\Omega, RC = 1 kΩ\Omega and VBE = 1.0 V. The minimum base current and the input voltage at which the transistor will go to saturation, will be respectively:

Figure

Show answer and solution

Answer: (d)

  1. At saturation VCE≈0V_{CE} \approx 0: IC=VCCRC=5 V1 kΩ=5 mAI_C = \dfrac{V_{CC}}{R_C} = \dfrac{5\ \text{V}}{1\ \text{k}\Omega} = 5\ \text{mA}
  2. Minimum base current: IB=ICβ=5 mA200=25 μAI_B = \dfrac{I_C}{\beta} = \dfrac{5\ \text{mA}}{200} = 25\ \mu\text{A}
  3. Input voltage: VBB=IBRB+VBE=25 μA×100 kΩ+1=3.5 VV_{BB} = I_B R_B + V_{BE} = 25\ \mu\text{A} \times 100\ \text{k}\Omega + 1 = 3.5\ \text{V}
  4. So the answer is (d) 25 μA25\ \mu\text{A} and 3.5 V.
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Q426JEE Main 2019 · 8 APR · SHIFT 2DifficultOld syllabus

Junction Transistor · CE amplifier gains

A common emitter amplifier circuit, built using an npn transistor, is shown in the figure. Its dc current gain is 250, RC = 1kΩ\Omega and VCC = 10 V. What is the minimum base current for VCE to reach saturation?

Figure

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Answer: (d)

  1. At saturation VCE≈0V_{CE} \approx 0: IC=VCCRC=10 V1 kΩ=10 mAI_C = \dfrac{V_{CC}}{R_C} = \dfrac{10\ \text{V}}{1\ \text{k}\Omega} = 10\ \text{mA}
  2. Minimum base current: IB=ICβ=10 mA250=40 μAI_B = \dfrac{I_C}{\beta} = \dfrac{10\ \text{mA}}{250} = 40\ \mu\text{A}
  3. So the answer is (d) 40 μA40\ \mu\text{A}.
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Q427JEE Main 2018 · 15 APR · SHIFT 1EasyOld syllabus

Junction Transistor · CE amplifier gains

In a common emitter configuration with suitable bias, it is given that RLR_L is the load resistance and RBER_{BE} is small signal dynamic resistance (input side). Then, voltage gain, current gain and power gain are given, respectively, by:

β\beta is current gain, IB,IC\mathrm{I}_B, \mathrm{I}_C and IE\mathrm{I}_E are respectively base, collector and emitter currents.

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Answer: (a)

  1. Current gain β=ΔICΔIB\beta = \frac{\Delta I_C}{\Delta I_B}
  2. Voltage gain AV=βRLRBEA_V = \beta\frac{R_L}{R_{BE}}
  3. Power gain AP=βAV=β2RLRBEA_P = \beta A_V = \beta^2\frac{R_L}{R_{BE}}
  4. So the answer is (a).
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Q428NEET 2018MediumOld syllabus

Junction Transistor · Current relations

In the circuit shown in the figure, the input voltage Vi is 20 V, VBE = 0 and VCE = 0. The values of IB, IC and β\beta are given by

Figure

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Answer: (d)

  1. Base loop with VBE=0V_{BE} = 0: IB=ViRB=20500×103=40 μI_B = \dfrac{V_i}{R_B} = \dfrac{20}{500 \times 10^3} = 40\ \muA.
  2. Collector loop with VCE=0V_{CE} = 0: IC=204×103=5I_C = \dfrac{20}{4 \times 10^3} = 5 mA.
  3. β=ICIB=5×10−340×10−6=125\beta = \dfrac{I_C}{I_B} = \dfrac{5 \times 10^{-3}}{40 \times 10^{-6}} = 125
  4. So the answer is (d).
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Q429JEE Main 2017EasyOld syllabus

Junction Transistor · CE amplifier gains

In a common emitter amplifier circuit using an n-p-n transistor, the phase difference between the input and the output voltages will be:

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Answer: (a)

  1. In CE mode, Vo=VCC−ICRLV_o = V_{CC} - I_C R_L: when input rises, ICI_C rises and VoV_o falls.
  2. So output is inverted, phase difference 180∘180^\circ.
  3. So the answer is (a) 180∘180^\circ.
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Q430JEE Main 2017 · 9 APR · SHIFT 1MediumOld syllabus

Junction Transistor · Current relations

The current gain of a common emitter amplifier is 69. If the emitter current is 7.0 mA, collector current is:

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Answer: (b)

  1. α=β1+β=6970\alpha = \dfrac{\beta}{1+\beta} = \dfrac{69}{70}
  2. IC=αIE=6970×7.0=6.9I_C = \alpha I_E = \dfrac{69}{70} \times 7.0 = 6.9 mA.
  3. So the answer is (b) 6.9 mA.
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Q431NEET 2017MediumOld syllabus

Junction Transistor · CE amplifier gains

In a common emitter transistor amplifier the audio sgnal voltage across the collector is 3 V. The resistance of collector is 3 kΩ\Omega. If current gain is 100 and the base resistance is 2 kΩ\Omega, the voltage and power gain of the amplifier is

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Answer: (b)

  1. Voltage gain AV=βRCRB=100×32=150A_V = \beta \dfrac{R_C}{R_B} = 100 \times \dfrac{3}{2} = 150
  2. Power gain =β×AV=100×150=15000= \beta \times A_V = 100 \times 150 = 15000
  3. So the answer is (b) 150 and 15000.
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Q432JEE Main 2016EasyOld syllabus

Junction Transistor · Current relations

For a common emitter configuration, if α\alpha and β\beta have their usual meanings, the incorrect relationship between α\alpha and β\beta is:

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Answer: (b)

  1. Correct relation: α=β1+β\alpha = \frac{\beta}{1+\beta}, i.e. 1α=1β+1\frac{1}{\alpha} = \frac{1}{\beta} + 1, so (a) and (c) are correct.
  2. (b) α=β21+β2\alpha = \frac{\beta^2}{1+\beta^2} does not follow from α=β1+β\alpha = \frac{\beta}{1+\beta}, so it is incorrect.
  3. (d) α=β1−β2\alpha = \frac{\beta}{1-\beta^2} is also not a valid relation.
  4. The intended answer is (b).
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Q433NEET 2016 · PHASE 2MediumOld syllabus

Junction Transistor · CE amplifier gains

For CE transistor amplifier, the audio signal voltage across the collector resistance of 2 kΩ\Omega is 4 V. If the current amplification factor of the transistor is 100 and the base resistance is 1 kΩ\Omega, then the input signal voltage is

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Answer: (b)

  1. IC=VoRC=42000=2I_C = \dfrac{V_o}{R_C} = \dfrac{4}{2000} = 2 mA.
  2. IB=ICβ=2 mA100=20 μI_B = \dfrac{I_C}{\beta} = \dfrac{2\text{ mA}}{100} = 20\ \muA.
  3. Vi=IBRB=20×10−6×1000=20V_i = I_B R_B = 20 \times 10^{-6} \times 1000 = 20 mV
  4. So the answer is (b) 20 mV.
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Q434JEE Main 2016 · 10 APR · SHIFT 1MediumOld syllabus

Junction Transistor · Characteristics & transistor testing

The ratio (R) of output resistance r0, and the input resistance ri in measurements of input and output characteristics of a transistor is typically in the range:

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Answer: (b)

  1. Input resistance ri=ΔVBE/ΔIBr_i = \Delta V_{BE}/\Delta I_B (from input characteristics) is of the order of a few hundred ohm to about 1 kΩ\Omega.
  2. Output resistance ro=ΔVCE/ΔICr_o = \Delta V_{CE}/\Delta I_C (from the flat part of output characteristics) is much larger.
  3. The answer key takes the typical ratio R=ro/riR = r_o/r_i to be in the range 1 to 10.
  4. So the answer (as per key) is (b) R∼1−10R \sim 1 - 10.
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Q435NEET 2016 · PHASE 1DifficultOld syllabus

Junction Transistor · CE amplifier gains

A npn transistor is connected in common emitter configuration in a given amplifier. A load resistance of 800 Ω\Omega is connected in the collector circuit and the voltage drop across it is 0.8 V. If the current amplification factor is 0.96 and the input resistance of the circuit is 192 Ω\Omega, the voltage gain and the power gain of the amplifier will respectively be

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Answer: (c)

  1. Taking the given current amplification factor as β=0.96\beta = 0.96 (as in the official solution).
  2. Voltage gain: Av=βRLRi=0.96×800192=4A_v = \beta \dfrac{R_L}{R_i} = 0.96 \times \dfrac{800}{192} = 4
  3. Power gain: Ap=βAv=0.96×4=3.84A_p = \beta A_v = 0.96 \times 4 = 3.84
  4. So the answer is (c) 4, 3.84.
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Q436JEE Main 2016 · 10 APR · SHIFT 1DifficultOld syllabus

Junction Transistor · Characteristics & transistor testing

A realistic graph depicting the variation of the reciprocal of input resistance in an input characteristics measurement in a common emitter transistor configuration is:

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Answer: (c)

  1. Input characteristic: IBI_B is almost zero until VBEV_{BE} reaches the knee (about 0.6 V), then rises sharply.
  2. So 1/ri=ΔIB/ΔVBE1/r_i = \Delta I_B/\Delta V_{BE} is nearly zero below 0.6 V, then rises and levels off at a finite value (a few hundred ohm to 1 kΩ\Omega input resistance, i.e. about 0.01 Ω−10.01\ \Omega^{-1} scale).
  3. This is the S-shaped curve of option (a); option (c) starting at 10 Ω−110\ \Omega^{-1} and diverging at 1 V is unrealistic.
  4. So the working gives (a).
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Q437JEE Main 2016 · 9 APR · SHIFT 1DifficultOld syllabus

Junction Transistor · Characteristics & transistor testing

An unknown transistor needs to be identified as a npn or pnp type. A multimeter, with + ve and − ve terminals, is used to measure resistance between different terminals of transistor. If terminal 2 is the base of the transistor then which of the following is correct for a pnp transistor?

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Answer: (a)

  1. In a pnp transistor the base (terminal 2) is n-type; emitter and collector are p-type.
  2. In an analog multimeter (resistance mode) the +ve terminal is connected to the negative of the internal cell, so it is at the lower potential.
  3. +ve on 1, −ve on 2 puts the p-side (1) at lower potential than the n-base: the junction is reverse biased, so resistance is high.
  4. So the answer is (a).
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Q438NEET 2015 · AIPMTMediumOld syllabus

Junction Transistor · CE amplifier gains

The input signal given to a CE amplifier having a voltage gain of 150 is Vi = 2cos(15t + π3\frac{\pi}{3} ). The corresponding output signal will be

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Answer: (b)

  1. Output amplitude =AV×2=150×2=300= A_V \times 2 = 150 \times 2 = 300.
  2. A CE amplifier reverses phase, so add π\pi: π3+π=4π3\dfrac{\pi}{3} + \pi = \dfrac{4\pi}{3}.
  3. Vo=300cos⁡(15t+4π3)V_o = 300\cos\left(15t + \dfrac{4\pi}{3}\right)
  4. So the answer is (b).
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Q439JEE Main 2014 · 9 APR · SHIFT 1DifficultOld syllabus

Junction Transistor · Characteristics & transistor testing

An n-p-n transistor has three leads A, B and C. Connecting B and C by moist fingers, A to the positive lead of an ammeter, and C to the negative lead of the ammeter, one finds large deflection. Then, A, B and C refer respectively to:

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Answer: (a)

  1. In the meter used as an ohmmeter, the +ve lead is connected to the negative of the internal cell, so A is at lower potential and C at higher potential.
  2. Moist fingers join B to C, so the base gets a small current from the higher-potential lead.
  3. For an npn transistor, a large current flows only when the collector is at high potential, the emitter low, and the base is forward biased with respect to the emitter.
  4. So A is emitter, B is base and C is collector: answer (a).
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Q440NEET 2013MediumOld syllabus

Junction Transistor · Structure & biasing

One way in which the operation of a n-p-n transistor differs from that of a p-n-p

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Answer: (b)

  1. In both types the emitter junction is forward biased and injects carriers that are minority carriers in the base.
  2. The difference is the type of carrier: holes in p-n-p, electrons in n-p-n.
  3. So the answer is (b).
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Q441NEET 2013DifficultOld syllabus

Junction Transistor · CE amplifier gains

In a common emitter (CE) amplifier having a voltage gain G, the transistor used has transconductance 0.03 mho and current gain 25. If the above transistor is replaced with another one with transconductance 0.02 mho and current gain 20, the voltage gain will be

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Answer: (c)

  1. Voltage gain Av=gmRLA_v = g_m R_L; it depends only on transconductance for the same load.
  2. G′G=0.020.03=23\dfrac{G'}{G} = \dfrac{0.02}{0.03} = \dfrac{2}{3}
  3. So the answer is (c) 23G\dfrac{2}{3}G.
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Q442NEET 2012 · AIPMT · PRELIMSEasyOld syllabus

Junction Transistor · Switch & oscillator

Transfer characteristics [output voltage (V0) vs input voltage (Vi)] for a base biased transistor in CE configuration is as shown in the figure. For using transistor as a switch, it is used

Figure

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Answer: (b)

  1. A switch needs only two states: OFF and ON.
  2. Region I: ViV_i small, transistor in cut-off, IC≈0I_C \approx 0, V0V_0 high (switch OFF).
  3. Region III: ViV_i large, transistor in saturation, V0V_0 nearly zero (switch ON).
  4. Region II is the active region, used for amplification.
  5. So the answer is (b) both in region (I) and (III).
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Q443NEET 2012 · AIPMT · MAINSMediumOld syllabus

Junction Transistor · CE amplifier gains

The input resistance of a silicon transistor is 100 Ω\Omega. Base current is changed by 40 μ\muA which results in a change in collector current by 2 mA. This transistor is used as a common emitter amplifier with a load resistance of 4 kΩ\Omega. The voltage gain of the amplifier is

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Answer: (a)

  1. β=ΔICΔIB=2×10−340×10−6=50\beta = \dfrac{\Delta I_C}{\Delta I_B} = \dfrac{2 \times 10^{-3}}{40 \times 10^{-6}} = 50
  2. AV=βRLRi=50×4000100=2000A_V = \beta \dfrac{R_L}{R_i} = 50 \times \dfrac{4000}{100} = 2000
  3. So the answer is (a) 2000.
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Q444NEET 2012 · AIPMT · PRELIMSMediumOld syllabus

Junction Transistor · CE amplifier gains

In a CE transistor amplifier, the audio signal voltage across the collector resistance of 2 kΩ\Omega is 2 V. If the base resistance is 1 kΩ\Omega and the current amplification of the transistor is 100, the input signal voltage is

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Answer: (d)

  1. IC=VoRC=22000=1I_C = \dfrac{V_o}{R_C} = \dfrac{2}{2000} = 1 mA.
  2. IB=ICβ=1 mA100=10 μI_B = \dfrac{I_C}{\beta} = \dfrac{1\text{ mA}}{100} = 10\ \muA.
  3. Vi=IBRB=10×10−6×1000=10V_i = I_B R_B = 10 \times 10^{-6} \times 1000 = 10 mV
  4. So the answer is (d) 10 mV.
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Q445NEET 2011 · AIPMT · PRELIMSEasyOld syllabus

Junction Transistor · Current relations

A transistor is operated in common emitter configuration at VC = 2 V such that a change in the base current from 100 μ\muA to 300 μ\muA produces a change in the collector current from 10 mA to 20 mA. The current gain is

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Answer: (a)

  1. β=ΔICΔIB\beta = \frac{\Delta I_C}{\Delta I_B}
  2. ΔIC=10\Delta I_C = 10 mA, ΔIB=200 μ\Delta I_B = 200\,\muA =0.2= 0.2 mA
  3. β=10/0.2=50\beta = 10/0.2 = 50
  4. So the answer is (a) 50.
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Q446NEET 2010 · AIPMT · MAINSEasyOld syllabus

Junction Transistor · Structure & biasing

For transistor action

(1) Base, emitter and collector regions should have similar size and doping concentrations. (2) The base region must be very thin and lightly doped.

(3) The emitter-base junction is forward biased and base-collector junction is reverse biased. (4) Both the emitter-base junction as well as the base-collector junction are forward biased. Which one of the following pairs of statements is correct?

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Answer: (c)

  1. (1) is wrong: regions have different sizes and doping.
  2. (2) is right: base is very thin and lightly doped.
  3. (3) is right: E-B junction forward biased, B-C junction reverse biased.
  4. (4) is wrong: if both are forward biased the transistor is in saturation, not active.
  5. So the answer is (c) (2) and (3).
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Q447NEET 2010 · AIPMT · PRELIMSEasyOld syllabus

Junction Transistor · CE amplifier gains

A common emitter amplifier has a voltage gain of 50, an input impedance of 100 Ω\Omega and an output impedance of 200 Ω\Omega. The power gain of the amplifier is

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Answer: (c)

  1. AV=βRoRi⇒β=50×100200=25A_V = \beta\frac{R_o}{R_i} \Rightarrow \beta = \frac{50 \times 100}{200} = 25
  2. AP=βAV=25×50=1250A_P = \beta A_V = 25 \times 50 = 1250
  3. So the answer is (c) 1250.
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Q448NEET 2009 · AIPMTEasyOld syllabus

Junction Transistor · Current relations

A transistor is operated in common-emitter configuration at VC = 2V such that a change in the base current from 100 μ\muA to 200 μ\muA produces a change in the collector current from 5 mA to 10 mA. The current gain is

Show answer and solution

Answer: (c)

  1. β=ΔICΔIB\beta = \frac{\Delta I_C}{\Delta I_B}
  2. ΔIC=5\Delta I_C = 5 mA, ΔIB=100 μ\Delta I_B = 100\,\muA =0.1= 0.1 mA
  3. β=5/0.1=50\beta = 5/0.1 = 50
  4. So the answer is (c) 50.
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Q449NEET 2008 · AIPMTMediumOld syllabus

Junction Transistor · Switch & oscillator

The voltage gain of an amplifier with 9% negative feedback is 10. The voltage gain without feedback will be

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Answer: (b)

  1. With negative feedback: Af=A1+βAA_f = \dfrac{A}{1 + \beta A}, β=0.09\beta = 0.09, Af=10A_f = 10
  2. 10(1+0.09A)=A⇒10+0.9A=A10(1 + 0.09A) = A \Rightarrow 10 + 0.9A = A
  3. 0.1A=10⇒A=1000.1A = 10 \Rightarrow A = 100
  4. So the answer is (b) 100.
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Q450JEE Main 2008 · AIEEEDifficultOld syllabus

Junction Transistor · Characteristics & transistor testing

A working transistor with its three legs marked P,QP, Q and RR is tested using a multi-meter. No conduction is found between PP and QQ. By connecting the common (negative) terminal of the multi- meter to RR and the other (positive) terminal to PP or Q,Q, some resistance is seen on the multi-meter. Which of the following is true for the transistor?

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Answer: (a)

  1. No conduction between P and Q, so they are emitter and collector (two back-to-back junctions); R is the base.
  2. In an analog multimeter the common (−ve) terminal is the positive of the internal cell, so R is at higher potential than P or Q.
  3. Conduction in this state means both base junctions are forward biased with the base positive, so the base is p-type.
  4. p-type base means npn transistor with R as base: answer (a).
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Q451NEET 2007 · AIPMTEasy

Junction Transistor · CE amplifier gains

A common emitter amplifier has a voltage gain of 50, an input impedance of 100 Ω100\ \Omega and an output impedance of 200 Ω200\ \Omega. The power gain of the amplifier is

Show answer and solution

Answer: (b)

  1. AV=βRoRi⇒β=50×100200=25A_V = \beta\frac{R_o}{R_i} \Rightarrow \beta = \frac{50 \times 100}{200} = 25
  2. AP=βAV=25×50=1250A_P = \beta A_V = 25 \times 50 = 1250
  3. So the answer is (b) 1250.
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Q452NEET 2006 · AIPMTEasyOld syllabus

Junction Transistor · Current relations

A transistor is operated in common emitter configuration at constant collector voltage VC = 1.5 V such that a change in the base current from 100 μ\muA to 150 μ\muA produces a change in the collector current from 5 mA to 10 mA. The current gain β\beta is

Show answer and solution

Answer: (d)

  1. β=ΔICΔIB\beta = \frac{\Delta I_C}{\Delta I_B}
  2. ΔIC=5\Delta I_C = 5 mA, ΔIB=50 μ\Delta I_B = 50\,\muA =0.05= 0.05 mA
  3. β=5/0.05=100\beta = 5/0.05 = 100
  4. So the answer is (d) 100.
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Q453JEE Main 2006 · AIEEEEasyOld syllabus

Junction Transistor · Current relations

In a common base mode of a transistor, the collector current is 5.488 mA5.488\,mA for an emitter current of 5.60 mA.5.60\,mA. The value of the base current amplification factor (β)(\beta) will be

Show answer and solution

Answer: (a)

  1. IB=IE−IC=5.60−5.488=0.112I_B = I_E - I_C = 5.60 - 5.488 = 0.112 mA
  2. β=ICIB=5.4880.112=49\beta = \frac{I_C}{I_B} = \frac{5.488}{0.112} = 49
  3. So the answer is (a) 49.
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Q454JEE Main 2005 · AIEEEEasyOld syllabus

Junction Transistor · CE amplifier gains

In a common base amplifier, the phase difference between the input signal voltage and output voltage is

Show answer and solution

Answer: (d)

  1. In a common base amplifier the input goes to the emitter and output is taken from the collector.
  2. An increase in input increases the collector current and the output voltage together, so there is no phase reversal.
  3. So the answer is (d) 00.
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Q455JEE Main 2004 · AIEEEEasyOld syllabus

Junction Transistor · Structure & biasing

When npnnpn transistor is used as an amplifer

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Answer: (c)

  1. In an n-p-n transistor, electrons are the majority carriers in the emitter.
  2. They are injected from emitter into the base, then most cross from base to collector.
  3. So the answer is (c) electrons move from base to collector.
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Q456JEE Main 2004 · AIEEEMediumOld syllabus

Junction Transistor · CE amplifier gains

For a transistor amplifier in common emitter configuration for load impedance of 1 kΩ (hfe=501\text{ k}\Omega\ (h_{fe} = 50 and hoe=25 μA/V)h_{oe} = 25\ \mu\text{A/V}) the current gain is

Show answer and solution

Answer: (d)

  1. h-parameter current gain: Ai=−hfe1+hoeRLA_i = -\dfrac{h_{fe}}{1 + h_{oe} R_L}
  2. hoeRL=25×10−6×103=0.025h_{oe} R_L = 25 \times 10^{-6} \times 10^3 = 0.025
  3. Ai=−501.025=−48.78A_i = -\dfrac{50}{1.025} = -48.78
  4. So the answer is (d) −48.78-48.78.
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Q457NEET 2003 · AIPMTEasyOld syllabus

Junction Transistor · Structure & biasing

A n-p-n transistor conducts when

Show answer and solution

Answer: (b)

  1. For conduction (active mode) the E-B junction is forward biased: n emitter must be negative relative to the p base.
  2. The C-B junction is reverse biased: n collector must be positive relative to the base.
  3. So the answer is (b) collector positive and emitter negative with respect to the base.
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Q458JEE Main 2002 · AIEEEEasyOld syllabus

Junction Transistor · Structure & biasing

The part of a transistor which is most heavily doped to produce large number of majority carriers is

Show answer and solution

Answer: (a)

  1. The emitter must inject a large number of majority carriers into the base.
  2. So it is the most heavily doped region.
  3. So the answer is (a) emitter.
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Q459NEET 2002 · AIPMTEasyOld syllabus

Junction Transistor · Current relations

For a transistor ICIE\frac{I_C}{I_E} = 0.96, then current gain for common emitter is

Show answer and solution

Answer: (d)

  1. α=0.96\alpha = 0.96
  2. β=α1−α=0.960.04=24\beta = \frac{\alpha}{1-\alpha} = \frac{0.96}{0.04} = 24
  3. So the answer is (d) 24.
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Q460NEET 2001 · AIPMTEasyOld syllabus

Junction Transistor · Current relations

For a common base circuit if ICIE\frac{I_C}{I_E} = 0.98 then current gain for common emitter circuit will be

Show answer and solution

Answer: (a)

  1. α=0.98\alpha = 0.98
  2. β=α1−α=0.980.02=49\beta = \frac{\alpha}{1-\alpha} = \frac{0.98}{0.02} = 49
  3. So the answer is (a) 49.
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Q461NEET 2000 · AIPMTEasyOld syllabus

Junction Transistor · Current relations

The correct relation for α,β\alpha, \beta for a transistor

Show answer and solution

Answer: (b)

  1. IB=IE−ICI_B = I_E - I_C, so β=ICIE−IC\beta = \frac{I_C}{I_E - I_C}
  2. Divide top and bottom by IEI_E: β=α1−α\beta = \frac{\alpha}{1-\alpha}
  3. So the answer is (b).
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Q462NEET 1998 · AIPMTMedium

Junction Transistor · CE amplifier gains

The transfer ratio β\beta of a transistor is 5050. The input resistance of the transistor when used in the common emitter configuration is 1 kΩ1\text{ k}\Omega. The peak value of the collector AC current for an AC input voltage of 0.01 V0.01\text{ V} peak is

Show answer and solution

Answer: (d)

  1. Peak base current IB=ViRi=0.011000=10 μI_B = \dfrac{V_i}{R_i} = \dfrac{0.01}{1000} = 10\ \muA.
  2. Peak collector current IC=βIB=50×10 μI_C = \beta I_B = 50 \times 10\ \muA =500 μ= 500\ \muA.
  3. So the answer is (d) 500 μ500\ \muA.
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Q463NEET 1997 · AIPMTEasy

Junction Transistor · Current relations

The correct relationship between the two current gains α\alpha and β\beta in a transistor is

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Answer: (a)

  1. IE=IB+ICI_E = I_B + I_C; divide by ICI_C: 1α=1β+1=1+ββ\frac{1}{\alpha} = \frac{1}{\beta} + 1 = \frac{1+\beta}{\beta}
  2. α=β1+β\alpha = \frac{\beta}{1+\beta}
  3. So the answer is (a).
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Q464NEET 1996 · AIPMTEasy

Junction Transistor · CE amplifier gains

When npn transistor is used as an amplifier, then

Show answer and solution

Answer: (c)

  1. In an n-p-n transistor, electrons are injected from the emitter into the thin base.
  2. Most of them diffuse across the base and are swept into the collector by the reverse-biased base-collector junction.
  3. So electrons move from base to collector: answer (c).
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Q465NEET 1993 · AIPMTEasy

Junction Transistor · Structure & biasing

The part of the transistor which is heavily doped to produce large number of majority carriers is

Show answer and solution

Answer: (a)

  1. The emitter's job is to supply majority carriers into the base.
  2. So it is the most heavily doped region, in both n-p-n and p-n-p transistors.
  3. So the answer is (a) emitter.
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Q466NEET 1991 · AIPMTEasy

Junction Transistor · CE amplifier gains

To use a transistor as an amplifier

Show answer and solution

Answer: (a)

  1. For active (amplifying) operation, the emitter-base junction must be forward biased to inject carriers.
  2. The collector-base junction must be reverse biased to collect them.
  3. So the answer is (a).
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Q467NEET 1990 · AIPMTEasy

Junction Transistor · CE amplifier gains

In a common base amplifier the phase difference between the input signal voltage and the output voltage is

Show answer and solution

Answer: (a)

  1. In CB mode, a rise in emitter current raises ICI_C and the output voltage rises with it.
  2. Input and output are in phase: phase difference =0= 0.
  3. So the answer is (a) 00.
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Q468NEET 1989 · AIPMTEasyOld syllabus

Junction Transistor · Switch & oscillator

Radiowaves of constant amplitude can be generated with

Show answer and solution

Answer: (d)

  1. An oscillator uses positive feedback to produce sustained a.c. oscillations of constant amplitude and frequency without any input signal.
  2. So the answer is (d) oscillator.
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Q469MHT CET 2026 · 20 MAY · SHIFT 1Easy

Logic Gates · Basic gates & truth tables

In a two input logic gate, when one input is '1' and the other is '0' (zero), the output is '1'. But even if both inputs are '0' (zero), the output is '1'. The logic gate is

Show answer and solution

Answer: (c)

  1. Inputs (1, 0) give 1 and inputs (0, 0) give 1.
  2. AND gives 0 for both; X-OR gives 0 for (0, 0); NOR gives 0 for (1, 0).
  3. NAND gives 1 unless both inputs are 1, so it fits both rows.
  4. So the answer is (c) a NAND gate.
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Q470MHT CET 2026 · 19 APR · SHIFT 1Easy

Logic Gates · Basic gates & truth tables

For a two input logic gate, when the inputs are 'zero' and 'zero' the output is 'one'. When the inputs are 'one' and 'zero' the output is 'zero'. The type of logic gate is

Show answer and solution

Answer: (c)

  1. (0, 0) gives 1, so the gate is NAND or NOR.
  2. (1, 0) gives 0: NAND would give 1, NOR gives 1+0‾=0\overline{1 + 0} = 0.
  3. So the answer is (c) NOR.
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Q471MHT CET 2026 · 18 APR · SHIFT 1Easy

Logic Gates · Basic gates & truth tables

Which of the following logic gates will have an output of '1' (one) for the given inputs?

Figure

Show answer and solution

Answer: (b)

  1. (A) NAND with (1, 1): 1⋅1‾=0\overline{1 \cdot 1} = 0
  2. (B) NAND with (1, 0): 1⋅0‾=1\overline{1 \cdot 0} = 1
  3. (C) NOR with (0, 1): 0+1‾=0\overline{0 + 1} = 0; (D) XOR with (0, 0): 00
  4. So the answer is (b) B.
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Q472MHT CET 2026 · 19 MAY · SHIFT 1Easy

Logic Gates · NAND, NOR & XOR

If two inputs of a NOR gate are shorted, the resulting gate is

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Answer: (d)

  1. Shorting the inputs makes B=AB = A.
  2. Y=A+A‾=A‾Y = \overline{A + A} = \overline{A}.
  3. So the answer is (d) a NOT gate.
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Q473MHT CET 2026 · 15 MAY · SHIFT 2Easy

Logic Gates · NAND, NOR & XOR

An AND gate is followed by a NOT gate in series. With two input AA and BB, the Boolean expression for the output YY will be

Show answer and solution

Answer: (b)

  1. AND output is A⋅BA \cdot B.
  2. NOT inverts it: Y=A⋅B‾Y = \overline{A \cdot B} (NAND).
  3. So the answer is (b) A⋅B‾\overline{A \cdot B}.
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Q474MHT CET 2026 · 16 APR · SHIFT 2Easy

Logic Gates · NAND, NOR & XOR

In which of the logic gate the following statement is true? "The output is high when either of the inputs is high but not if both inputs are high"

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Answer: (c)

  1. Output 1 when exactly one input is 1, and 0 when both are 1 (or both 0).
  2. This is Y=A⊕BY = A \oplus B.
  3. So the answer is (c) X-OR.
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Q475MHT CET 2026 · 11 APR · SHIFT 2Easy

Logic Gates · NAND, NOR & XOR

In the case of NAND gate, if A and B are inputs and Y is the output then

Show answer and solution

Answer: (c)

  1. NAND = AND followed by NOT.
  2. Y=A⋅B‾Y = \overline{A \cdot B}.
  3. So the answer is (c).
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Q476MHT CET 2026 · 20 APR · SHIFT 2Easy

Logic Gates · Boolean output of a circuit

In Boolean expression A+B=YA + B = Y implies that

Show answer and solution

Answer: (d)

  1. A+BA + B is the OR operation: Y=1Y = 1 if A=1A = 1, or B=1B = 1, or both are 1.
  2. So the answer is (d).
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Q477MHT CET 2026 · 20 MAY · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

To get output zero for the following circuit, the correct choice for the input is

Figure

a. A=1,B=1,C=0A = 1, B = 1, C = 0

b. A=0,B=1,C=0A = 0, B = 1, C = 0

c. A=1,B=1,C=1A = 1, B = 1, C = 1

d. A=1,B=0,C=1A = 1, B = 0, C = 1

Show answer and solution

Answer: (a)

  1. Circuit: Y=(A+B)⋅CY = (A + B) \cdot C.
  2. If C=0C = 0, then Y=0Y = 0 whatever AA and BB are.
  3. Choices a (C=0C = 0) and b (C=0C = 0) give Y=0Y = 0; c and d give Y=(1)⋅1=1Y = (1) \cdot 1 = 1.
  4. So the answer is (a) a and b.
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Q478MHT CET 2026 · 19 MAY · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

For the logic circuit given below, for

a) input A=0A = 0 and input B=1B = 1, and

b) input A=1A = 1 and input B=1B = 1, the output EE is respectively

Figure

Show answer and solution

Answer: (d)

  1. Top AND: C=A⋅BC = A \cdot B; bottom AND: D=A‾⋅BD = \overline{A} \cdot B.
  2. E=AB+A‾B=B(A+A‾)=BE = A B + \overline{A} B = B(A + \overline{A}) = B.
  3. Case a: B=1⇒E=1B = 1 \Rightarrow E = 1; case b: B=1⇒E=1B = 1 \Rightarrow E = 1.
  4. So the answer is (d) one and one.
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Q479MHT CET 2026 · 14 MAY · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The output Y, when all the three inputs are first high and then low, will respectively be

Figure

Show answer and solution

Answer: (d)

  1. AND of first two inputs, then NAND with the third: Y=(A⋅B)⋅C‾Y = \overline{(A \cdot B) \cdot C}.
  2. All HIGH: Y=1‾=0Y = \overline{1} = 0.
  3. All LOW: Y=0‾=1Y = \overline{0} = 1.
  4. So the answer is (d) 0,10, 1.
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Q480MHT CET 2026 · 20 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

The output Y of the following digital logic circuit will be '1' (one) for the inputs

Figure

Show answer and solution

Answer: (d)

  1. Circuit: Y=A‾+B⋅CY = \overline{A} + B \cdot C.
  2. All options have A=1A = 1, so A‾=0\overline{A} = 0 and Y=B⋅CY = B \cdot C.
  3. Y=1Y = 1 needs B=1B = 1 and C=1C = 1.
  4. So the answer is (d) A=1,B=1,C=1A = 1, B = 1, C = 1.
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Q481MHT CET 2026 · 19 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The Boolean expression for the given combination of logic gates is

Figure

Show answer and solution

Answer: (d)

  1. AND gate gives A⋅BA \cdot B; NOT gate gives Cˉ\bar{C}.
  2. The OR gate adds them: Y=(A⋅B)+CˉY = (A \cdot B) + \bar{C}.
  3. So the answer is (d) Y=(A⋅B)+CˉY = (A \cdot B) + \bar{C}.
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Q482MHT CET 2026 · 18 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The output Y of the given logic circuit is

Figure

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Answer: (c)

  1. Upper gate is NAND of A,BA, B: output A⋅B‾\overline{A \cdot B}.
  2. Lower gate is NOR of B,CB, C: output B+C‾\overline{B + C}.
  3. The OR gate adds them: Y=(A⋅B)‾+(B+C)‾Y = \overline{(A \cdot B)} + \overline{(B + C)}.
  4. So the answer is (c).
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Q483MHT CET 2026 · 17 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

In the following digital circuit, the output 'Y' will be '1' (one) for inputs 'A' and 'B' having values

Figure

Show answer and solution

Answer: (d)

  1. Upper gate: P=A⋅B‾P = \overline{A \cdot B}. Lower gate: Q=Aˉ+B‾Q = \overline{\bar{A} + B}.
  2. Final NOR: Y=P+Q‾Y = \overline{P + Q}, so Y=1Y = 1 only when P=0P = 0 and Q=0Q = 0.
  3. P=0P = 0 needs A=1,B=1A = 1, B = 1. Then Q=0+1‾=0Q = \overline{0 + 1} = 0 as well.
  4. So the answer is (d) A=1,B=1A = 1, B = 1.
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Q484MHT CET 2026 · 17 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

To get the truth table shown from the following logic circuit, the gate G should be

Figure

Show answer and solution

Answer: (c)

  1. Y=A+G(A,B)Y = A + G(A, B). The table shows Y=AY = A in every row.
  2. So when A=0A = 0, G must give 0 for both B=0B = 0 and B=1B = 1; when A=1A = 1, Y is 1 anyway.
  3. AND: 0⋅0=00 \cdot 0 = 0, 0⋅1=00 \cdot 1 = 0. OR, NAND and NOR each give 1 in one of these rows.
  4. So the answer is (c) AND gate.
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Q485JEE Main 2026 · 8 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The output YY for the given inputs AA and BB to the circuit is:

Figure

Show answer and solution

Answer: (b)

  1. Upper AND: A⋅BA \cdot B. Lower AND has a bubble on its A input: Aˉ⋅B\bar{A} \cdot B.
  2. Y=AB+AˉB=B(A+Aˉ)=BY = A B + \bar{A} B = B(A + \bar{A}) = B.
  3. From the waveform, B=1B = 1 for 00 to 22 s and B=0B = 0 for 22 to 33 s.
  4. So Y is 1 from 0 to 2 s and 0 from 2 to 3 s: the answer is (b).
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Q486JEE Main 2026 · 6 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

Refer to the logic circuit given below. For two inputs ( A=1,B=1A = 1, B = 1) and ( A=0,B=1A = 0, B = 1 ), output ( Y) will be ______.

Figure

Show answer and solution

Answer: (c)

  1. OR gate gives Aˉ+B\bar{A} + B; AND gate gives Aˉ⋅B\bar{A} \cdot B; final NOR: Y=(Aˉ+B)+AˉB‾=Aˉ+B‾Y = \overline{(\bar{A} + B) + \bar{A} B} = \overline{\bar{A} + B}.
  2. A=1,B=1A = 1, B = 1: Aˉ+B=1\bar{A} + B = 1, so Y=0Y = 0.
  3. A=0,B=1A = 0, B = 1: Aˉ+B=1\bar{A} + B = 1, so Y=0Y = 0.
  4. So the answer is (c) 0, 0 respectively.
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Q487JEE Main 2026 · 5 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

For the given logic circuit, which of the following inputs combination will make both LED-1 and LED- 2 to glow?

Figure

Show answer and solution

Answer: (c)

  1. LED-1 is driven by the OR gate: it glows when A+B=1A + B = 1.
  2. LED-2 is driven by A⋅(A+B)⋅C=A⋅CA \cdot (A + B) \cdot C = A \cdot C: it glows when A=1A = 1 and C=1C = 1.
  3. A=1,C=1A = 1, C = 1 also makes A+B=1A + B = 1, so both glow.
  4. So the answer is (c) A=1,B=0,C=1A = 1, B = 0, C = 1.
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Q488JEE Main 2026 · 23 JAN · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

For the given logic gate circuit, which of the following is the correct truth table?

Figure

Show answer and solution

Answer: (a)

  1. OR gate gives n+mn + m; NAND gate: z=n⋅(n+m)‾z = \overline{n \cdot (n + m)}.
  2. Since n⋅(n+m)=nn \cdot (n + m) = n, z=nˉz = \bar{n}.
  3. So z=1z = 1 when n=0n = 0 and z=0z = 0 when n=1n = 1, whatever m is.
  4. Table (a) rows (0,0,1),(0,1,1),(1,1,0),(1,0,0)(0,0,1), (0,1,1), (1,1,0), (1,0,0) match, so the answer is (a).
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Q489JEE Main 2026 · 22 JAN · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The correct truth table for the given input data of the following logic gate is:

Figure

Figure

Show answer and solution

Answer: (a)

  1. AND then NOT gives AB‾\overline{AB}; OR gives C+DC + D.
  2. Final AND then NOT: Y=AB‾⋅(C+D)‾=AB+C+D‾Y = \overline{\overline{AB}\cdot(C+D)} = AB + \overline{C+D}.
  3. Rows: 11011101: AB=1⇒Y=1AB = 1 \Rightarrow Y = 1; 00110011: AB=0, C+D=1⇒Y=0AB = 0,\ C+D = 1 \Rightarrow Y = 0.
  4. 10101010: AB=0, C+D=1⇒Y=0AB = 0,\ C+D = 1 \Rightarrow Y = 0; 11111111: AB=1⇒Y=1AB = 1 \Rightarrow Y = 1.
  5. Output column 1,0,0,11, 0, 0, 1. So the answer is (a).
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Q490JEE Main 2026 · 22 JAN · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

Find the correct combination of A,B,C\mathrm{A}, \mathrm{B}, \mathrm{C} and D inputs which can cause the LED to glow.

Figure

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Answer: (d)

  1. A NOR gate with joined inputs is a NOT gate: outputs Aˉ\bar{A} and Bˉ\bar{B}.
  2. NAND of these: AˉBˉ‾=A+B\overline{\bar{A}\bar{B}} = A + B (this is the LED anode side).
  3. Lower NOR gives C+D‾\overline{C + D} (the LED cathode side).
  4. LED glows when anode =1= 1 and cathode =0= 0: A+B=1A + B = 1 and C+D=1C + D = 1.
  5. Only 11011101 has at least one of A, B and at least one of C, D equal to 1. So the answer is (d) 1101.
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Q491MHT CET 2026 · 13 MAY · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

The following circuit is equivalent to

Figure

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Answer: (c)

  1. NOR gives A+B‾\overline{A + B}.
  2. NAND with joined inputs is a NOT gate, then another NOT: two inversions cancel.
  3. Y=A+B‾Y = \overline{A + B}.
  4. So the answer is (c) NOR gate.
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Q492MHT CET 2026 · 12 MAY · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

The output YY of the given logic circuit is similar to the output of

Figure

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Answer: (d)

  1. NOR output: A+B‾=AˉBˉ\overline{A+B} = \bar A \bar B; NAND output: AB‾=Aˉ+Bˉ\overline{AB} = \bar A + \bar B.
  2. AND of the two: Y=AˉBˉ(Aˉ+Bˉ)=AˉBˉ+AˉBˉ=AˉBˉY = \bar A \bar B(\bar A + \bar B) = \bar A \bar B + \bar A \bar B = \bar A \bar B
  3. Y=AˉBˉ=A+B‾Y = \bar A \bar B = \overline{A+B}
  4. So the answer is (d) NOR gate.
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Q493MHT CET 2026 · 12 MAY · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

The truth table for the system of four NAND gates as shown in the figure is

Figure

Figure

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Answer: (c)

  1. First NAND: C=AB‾C = \overline{AB}.
  2. Middle NANDs: AC‾\overline{AC} and BC‾\overline{BC}.
  3. Output: Y=AC‾⋅BC‾‾=AC+BC=(A+B)AB‾=ABˉ+AˉBY = \overline{\overline{AC}\cdot\overline{BC}} = AC + BC = (A+B)\overline{AB} = A\bar B + \bar A B, the XOR function.
  4. Truth table: 00→0, 01→1, 10→1, 11→000 \to 0,\ 01 \to 1,\ 10 \to 1,\ 11 \to 0.
  5. So the answer is (c).
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Q494MHT CET 2026 · 16 APR · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

The resultant gate and its Boolean expression in the given circuit is

Figure

______

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Answer: (c)

  1. NOR output: C=A+B‾C = \overline{A+B}.
  2. NOT gate inverts it: Y=A+B‾‾=A+BY = \overline{\overline{A+B}} = A + B.
  3. So the answer is (c) OR, A+BA + B.
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Q495MHT CET 2026 · 11 APR · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

What does the following combination of gates produce?

Figure

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Answer: (a)

  1. NOT gates give Aˉ\bar A and Bˉ\bar B.
  2. NOR G3G_3: Aˉ+Bˉ‾=AB\overline{\bar A + \bar B} = AB (De Morgan).
  3. NOT G4G_4: Y=AB‾Y = \overline{AB}.
  4. So the answer is (a) NAND gate.
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Q496JEE Main 2026 · 2 APR · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

If X and Y are the inputs, the given circuit works as _________.

Figure

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Answer: (d)

  1. Tied NANDs act as NOT: Xˉ\bar X, Yˉ\bar Y.
  2. Middle NAND: XˉYˉ‾=X+Y\overline{\bar X \bar Y} = X + Y.
  3. Last tied NAND (NOT): output =X+Y‾= \overline{X+Y}.
  4. So the answer is (d) NOR gate.
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Q497JEE Main 2026 · 28 JAN · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

Two p-n junction diodes D1D_1 and D2D_2 are connected as shown in figure. AA and BB are input signals and CC is the output. The given circuit will function as a ________.

Figure

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Answer: (a)

  1. Each diode has its anode at the output node (fed by RR from 5 V) and its cathode at an input.
  2. If any input is 0 (0 V), that diode is forward biased and pulls CC to about 0: C=0C = 0.
  3. Only when A=B=1A = B = 1 are both diodes off, so CC = 5 V = 1.
  4. C=A⋅BC = A \cdot B, so the answer is (a) AND Gate.
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Q498JEE Main 2026 · 24 JAN · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

Identify the correct truth table of the given logic circuit.

Figure

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Answer: (a)

  1. Upper AND with tied inputs passes AA.
  2. NAND gives AB‾\overline{AB}; the tied AND after it passes it unchanged.
  3. Final AND: Y=AAB‾=A(Aˉ+Bˉ)=ABˉY = A\overline{AB} = A(\bar A + \bar B) = A\bar B.
  4. Table: 00→0, 01→0, 10→1, 11→000 \to 0,\ 01 \to 0,\ 10 \to 1,\ 11 \to 0.
  5. So the answer is (a).
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Q499JEE Main 2026 · 21 JAN · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

The given circuit works as:

Figure

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Answer: (d)

  1. Tied NORs act as NOT: Aˉ\bar A, Bˉ\bar B.
  2. Middle NOR: Aˉ+Bˉ‾=AB\overline{\bar A + \bar B} = AB.
  3. Last tied NOR (NOT): output =AB‾= \overline{AB}.
  4. So the answer is (d) NAND gate.
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Q500MHT CET 2026 · 15 APR · SHIFT 2Difficult

Logic Gates · Boolean output of a circuit

In the logic circuit diagram, when all the four inputs, A, B, C, D are 'one' the outputs Y1,Y2,Y3Y_1, Y_2, Y_3 are respectively (1, 1, 0). When the inputs A and C are changed to zero and B and D are still 'one', then the outputs Y1,Y2,Y3Y_1, Y_2, Y_3 are respectively change to

Figure

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Answer: (b)

  1. NOR followed by NOT gives Y1=A+BY_1 = A + B; the AND gives Y2=CDY_2 = CD; the NOR gives Y3=Y1+Y2‾Y_3 = \overline{Y_1 + Y_2}.
  2. Check: all inputs 1 gives Y1=1,Y2=1,Y3=0Y_1 = 1, Y_2 = 1, Y_3 = 0, as stated.
  3. Now A=C=0A = C = 0, B=D=1B = D = 1: Y1=0+1=1Y_1 = 0 + 1 = 1, Y2=0⋅1=0Y_2 = 0 \cdot 1 = 0, Y3=1+0‾=0Y_3 = \overline{1 + 0} = 0.
  4. So the answer is (b) 1,0,01, 0, 0.
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Q501JEE Main 2026 · 4 APR · SHIFT 1Difficult

Logic Gates · Boolean output of a circuit

Two 4 bits binary numbers, A=1101A = 1101 and B=1010B = 1010 are given in the inputs of a logic circuit shown in figure below. The output (Y)(Y) will be:

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Answer: (a)

  1. Y=Aˉ⋅B‾=A+BˉY = \overline{\bar{A} \cdot B} = A + \bar{B}, applied bit by bit.
  2. B=1010⇒Bˉ=0101B = 1010 \Rightarrow \bar{B} = 0101.
  3. A+Bˉ=1101+0101A + \bar{B} = 1101 + 0101 (bitwise OR) =1101= 1101.
  4. So the answer is (a) Y=1101Y = 1101.
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Q502MHT CET 2025 · 26 APR · SHIFT 2Easy

Logic Gates · Basic gates & truth tables

In a certain 2 -inputs logic gate, when inputs A=0\mathrm{A} = 0 and B=0\mathrm{B} = 0, then output C=1\mathrm{C} = 1. And also when inputs A=0, B=1\mathrm{A} = 0,\ \mathrm{B} = 1, then again output C=1\mathrm{C} = 1. The gate must be

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Answer: (c)

  1. (0, 0) gives 1: OR and AND give 0, so it is NAND or NOR.
  2. (0, 1) gives 1: NOR gives 0, NAND gives 0⋅1‾=1\overline{0 \cdot 1} = 1.
  3. So the answer is (c) NAND.
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Q503MHT CET 2025 · 5 MAY · SHIFT 2Easy

Logic Gates · NAND, NOR & XOR

An AND gate is followed by a NOT gate in series. With two inputs ' AA ' and ' BB ', the Boolean expression for the output ' Y ' will be

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Answer: (b)

  1. AND output is A⋅BA \cdot B.
  2. NOT inverts it: Y=A⋅B‾Y = \overline{A \cdot B} (NAND).
  3. So the answer is (b) A⋅B‾\overline{A \cdot B}.
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Q504MHT CET 2025 · 25 APR · SHIFT 1Easy

Logic Gates · NAND, NOR & XOR

The logic gate for which the output goes 'HIGH' or ' 1 ' only when an odd number of 'HIGH' or ' 1 ' are at its input, is

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Answer: (c)

  1. XOR output is 1 for inputs (0,1)(0,1) and (1,0)(1,0), i.e. one HIGH input (odd number), and 0 for (0,0)(0,0) and (1,1)(1,1).
  2. So the answer is (c) Ex-OR gate.
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Q505MHT CET 2025 · 21 APR · SHIFT 1Easy

Logic Gates · Equivalent gate & universal gates

Which of the following logic gates is called as Universal gate?

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Answer: (d)

  1. NAND (and NOR) are universal gates: AND, OR and NOT can all be built from them alone.
  2. OR, X-OR and AND cannot do this by themselves.
  3. So the answer is (d) NAND.
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Q506MHT CET 2025 · 25 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

One of the following values of inputs A,B\mathrm{A}, \mathrm{B} and C respectively gives output (Y)(\mathrm{Y}) of the following combination of logic gates as ' 1 ' is

Figure

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Answer: (d)

  1. OR gate gives B+CB + C; AND with A gives Y=A⋅(B+C)Y = A \cdot (B + C).
  2. Y = 1 needs A=1A = 1 and at least one of B,CB, C equal to 1.
  3. (a), (b) have A=0A = 0; (c) has B+C=0B + C = 0; (d) 1⋅(0+1)=11 \cdot (0 + 1) = 1.
  4. So the answer is (d) 1,0,11, 0, 1.
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Q507MHT CET 2025 · 25 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

To get output of the following logic circuit as ' 0 ' (zero), the inputs A,B,CA, B, C should NOT be, respectively,

Figure

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Answer: (d)

  1. NOR gives A+B‾\overline{A + B}; AND with C gives Y=A+B‾⋅CY = \overline{A + B} \cdot C.
  2. Y = 1 only when A=0,B=0,C=1A = 0, B = 0, C = 1; every other input gives Y = 0.
  3. So the inputs that do NOT give 0 are 0,0,10, 0, 1.
  4. So the answer is (d).
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Q508MHT CET 2025 · 22 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

In the logic circuit given, A,B\mathrm{A}, \mathrm{B} and C are the inputs and Y is the output. The output Y is HIGH

Figure

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Answer: (c)

  1. NOR gives B+C‾\overline{B + C}; AND with A gives Y=A⋅B+C‾Y = A \cdot \overline{B + C}.
  2. Y = 1 needs A=1A = 1 and B=C=0B = C = 0.
  3. So the answer is (c) A=1,B=0,C=0A = 1, B = 0, C = 0.
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Q509MHT CET 2025 · 21 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

In the following combination of logic gates, the output YY can be written in the terms of inputs AA and B as

Figure

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Answer: (c)

  1. Upper branch: AND of A,BA, B then NOT gives A⋅B‾\overline{A \cdot B}.
  2. Lower branch: A is inverted and ANDed with B, giving Aˉ⋅B\bar{A} \cdot B.
  3. OR gate: Y=(A⋅B‾)+(Aˉ⋅B)Y = (\overline{A \cdot B}) + (\bar{A} \cdot B).
  4. So the answer is (c).
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Q510MHT CET 2025 · 19 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

In a given logic circuit, the output Y when all the three inputs A,B,C\mathrm{A}, \mathrm{B}, \mathrm{C} are first low and then high will be respectively

Figure

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Answer: (c)

  1. Y=Aˉ+B⋅C‾Y = \bar{A} + \overline{B \cdot C} (NOT on A, NAND on B, C, then OR).
  2. All low: Y=1+0‾=1Y = 1 + \overline{0} = 1.
  3. All high: Y=0+1‾=0Y = 0 + \overline{1} = 0.
  4. So the answer is (c) (1,0)(1, 0).
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Q511JEE Main 2025 · 7 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

Consider the following logic circuit.

Figure

The output is Y = 0 when:

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Answer: (c)

  1. AND gate: ABAB. OR gate gets BB and Aˉ\bar{A}: Aˉ+B\bar{A} + B.
  2. Y=AB⋅(Aˉ+B)‾Y = \overline{AB\cdot(\bar{A} + B)} (NAND).
  3. Y=0Y = 0 only when both NAND inputs are 1: AB=1⇒A=B=1AB = 1 \Rightarrow A = B = 1, and then Aˉ+B=1\bar{A} + B = 1 too.
  4. So the answer is (c) A=1A = 1 and B=1B = 1.
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Q512JEE Main 2025 · 3 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The truth table corresponding to the circuit given below is:

Figure

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Answer: (a)

  1. OR gives A+BA + B; the AND gate also gets AA directly.
  2. C=A(A+B)=A+AB=AC = A(A + B) = A + AB = A.
  3. So CC simply follows AA: rows 00→000 \to 0, 01→001 \to 0, 10→110 \to 1, 11→111 \to 1.
  4. So the answer is (a).
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Q513JEE Main 2025 · 3 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

Choose the correct logic circuit for the given truth table having inputs A and B.

Figure

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Answer: (a)

  1. From the table, Y=1Y = 1 exactly when A=1A = 1, so Y=AY = A.
  2. (a): Y=A(A+B)=AY = A(A + B) = A, matches.
  3. (b): Aˉ(A+B)=AˉB\bar{A}(A+B) = \bar{A}B; (c): A A+B‾=0A\,\overline{A+B} = 0; (d): B(A+B)=BB(A+B) = B. None match.
  4. So the answer is (a).
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Q514JEE Main 2025 · 2 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

In the digital circuit shown in the figure, for the given inputs the PP and QQ values are:

Figure

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Answer: (c)

  1. Inputs 1,11, 1: NAND output =1⋅1‾=0= \overline{1\cdot 1} = 0.
  2. Both NOT gates give 00, so the OR gate output =0+0=0= 0 + 0 = 0.
  3. PP = AND(NAND output, OR output) =0⋅0=0= 0\cdot 0 = 0.
  4. QQ = NOR(0‾\overline{0}, OR output) =1+0‾=0= \overline{1 + 0} = 0.
  5. So the answer is (c) P=0,Q=0P = 0, Q = 0.
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Q515JEE Main 2025 · 29 JAN · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The truth table for the circuit given below is:

Figure

Figure

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Answer: (d)

  1. Upper AND gets AA and Bˉ\bar{B}: ABˉA\bar{B}. Lower AND gets Aˉ\bar{A} and BB: AˉB\bar{A}B.
  2. Y=ABˉ+AˉBY = A\bar{B} + \bar{A}B, which is XOR.
  3. Truth table: 00→000 \to 0, 01→101 \to 1, 10→110 \to 1, 11→011 \to 0.
  4. So the answer is (d).
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Q516JEE Main 2025 · 28 JAN · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

Which of the following circuits has the same output as that of the given circuit?

Figure

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Answer: (a)

  1. Upper AND: ABˉA\bar{B}. Lower AND gets AA and BB directly: ABAB.
  2. NOR output: Y=ABˉ+AB‾=A(Bˉ+B)‾=AˉY = \overline{A\bar{B} + AB} = \overline{A(\bar{B} + B)} = \bar{A}.
  3. Option (a) is a NAND gate with both inputs joined to A, which is a NOT gate: Y=AˉY = \bar{A}.
  4. So the answer is (a).
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Q517JEE Main 2025 · 22 JAN · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

Figure

To obtain the given truth table, following logic gate should be placed at G:

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Answer: (a)

  1. The two AND gates give ABˉA\bar{B} and AˉB\bar{A}B (each gets one input inverted).
  2. Required table: Y=1Y = 1 for 0000 and 1111, Y=0Y = 0 for 0101 and 1010, which is XNOR.
  3. ABˉ+AˉB‾\overline{A\bar{B} + \bar{A}B} is XNOR, so G must be OR followed by NOT.
  4. So the answer is (a) NOR gate.
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Q518MHT CET 2025 · 20 APR · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

The resultant logic gate from the combination of following gates is

Figure

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Answer: (a)

  1. NOT gates give Aˉ\bar A and Bˉ\bar B.
  2. NAND: Y=Aˉ⋅Bˉ‾=A+BY = \overline{\bar A \cdot \bar B} = A + B (De Morgan).
  3. So the answer is (a) OR.
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Q519NEET 2025Medium

Logic Gates · Equivalent gate & universal gates

The output ( YY) of the given logic implementation is similar to the output of an/a ________ gate.

Figure

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Answer: (b)

  1. NOR: A+B‾=AˉBˉ\overline{A+B} = \bar A \bar B; NAND: AB‾=Aˉ+Bˉ\overline{AB} = \bar A + \bar B.
  2. AND: Y=AˉBˉ(Aˉ+Bˉ)=AˉBˉ=A+B‾Y = \bar A \bar B(\bar A + \bar B) = \bar A \bar B = \overline{A+B}.
  3. So the answer is (b) NOR.
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Q520JEE Main 2025 · 29 JAN · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

Figure

For the circuit shown above, equivalent GATE is:

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Answer: (d)

  1. NAND gives AB‾\overline{AB}; NOR gives A+B‾\overline{A+B}.
  2. Final NAND: Y=AB‾⋅A+B‾‾=AB+(A+B)Y = \overline{\overline{AB}\cdot\overline{A+B}} = AB + (A+B).
  3. Y=A+BY = A + B (since ABAB is already included in A+BA+B).
  4. So the answer is (d) OR gate.
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Q521JEE Main 2025 · 4 APR · SHIFT 1Difficult

Logic Gates · NAND, NOR & XOR

The Boolean expression Y=ABˉC+AˉCˉ\mathrm{Y} = A\bar{B}C + \bar{A}\bar{C} can be realised with which of the following gate configurations.

A. One 3-input AND gate, 3 NOT gates and one 2-input OR gate, one 2-input AND gate B. One 3 -input AND gate, 1 NOT gate, One 2 -input NOR gate and one 2 -input OR gate C. 3 -input OR gate, 3 NOT gates and one 2 -input AND gate

Choose the correct answer from the options given below:

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Answer: (c)

  1. A: NOTs give Bˉ\bar{B}, Aˉ\bar{A}, Cˉ\bar{C}; 3-input AND gives ABˉCA\bar{B}C; 2-input AND gives AˉCˉ\bar{A}\bar{C}; OR adds them. Works.
  2. B: AˉCˉ=A+C‾\bar{A}\bar{C} = \overline{A + C} from one 2-input NOR; one NOT gives Bˉ\bar{B} for the 3-input AND; OR adds them. Works.
  3. C: a 3-input OR with NOTs gives Aˉ+B+Cˉ=ABˉC‾\bar{A} + B + \bar{C} = \overline{A\bar{B}C}, the complement of the needed term, and no gate is left to invert it. Fails.
  4. So the answer is (c) A, B Only.
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Q522JEE Main 2025 · 24 JAN · SHIFT 2Difficult

Logic Gates · Boolean output of a circuit

The output of the circuit is low (zero) for:

Figure

(A) X=0,Y=0X = 0, Y = 0

(B) X=0,Y=1X = 0, Y = 1

(C) X=1,Y=0X = 1, Y = 0

(D) X=1,Y=1X = 1, Y = 1

Choose the correct answer from the options given below:

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Answer: (c)

  1. The first gate is OR: output X+YX + Y.
  2. The NOR with both inputs joined acts as NOT, so output =X+Y‾= \overline{X + Y} (overall NOR).
  3. Output is 0 whenever X+Y=1X + Y = 1, i.e. for (0,1)(0,1), (1,0)(1,0) and (1,1)(1,1).
  4. So the answer is (c) (B), (C) and (D) only.
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Q523MHT CET 2024 · 15 MAY · SHIFT 1Easy

Logic Gates · Basic gates & truth tables

Two different logic gates giving output ' 1 ' for the inputs (1,0)(1, 0) and then for (0,1)(0, 1) are

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Answer: (d)

  1. For (1, 0) and (0, 1): AND gives 0, OR gives 1, NAND gives 1, NOR gives 0.
  2. So the two gates giving 1 are NAND and OR: answer (d).
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Q524MHT CET 2024 · 3 MAY · SHIFT 2Easy

Logic Gates · NAND, NOR & XOR

The Boolean expression for 'X-OR' gate C=(A⊕B)C = (A \oplus B) is equal to

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Answer: (d)

  1. XOR is 1 only when the inputs differ: A=0,B=1A = 0, B = 1 or A=1,B=0A = 1, B = 0.
  2. These two cases are A‾⋅B\overline{A} \cdot B and A⋅B‾A \cdot \overline{B}.
  3. A⊕B=A‾⋅B+A⋅B‾A \oplus B = \overline{A} \cdot B + A \cdot \overline{B}.
  4. So the answer is (d).
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Q525NEET 2024Easy

Logic Gates · NAND, NOR & XOR

When the output of an OR gate is applied as input to a NOT gate, then the combination acts as a

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Answer: (b)

  1. OR output is A+BA + B.
  2. NOT inverts it: Y=A+B‾Y = \overline{A + B}.
  3. So the answer is (b) NOR gate.
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Q526MHT CET 2024 · 3 MAY · SHIFT 2Medium

Logic Gates · NAND, NOR & XOR

The combination of NAND gates is shown in figure (I) and (II). For the given inputs, the outputs in both the combinations are respectively.

Figure

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Answer: (b)

  1. (I) Each input NAND has shorted inputs, so it is a NOT: 0‾=1\overline{0} = 1 and 0‾=1\overline{0} = 1.
  2. Final NAND: 1⋅1‾=0\overline{1 \cdot 1} = 0.
  3. (II) NAND followed by a NAND with shorted inputs (NOT) gives AND: Y=A⋅BY = A \cdot B.
  4. With both inputs HIGH, Y=1⋅1=1Y = 1 \cdot 1 = 1.
  5. So the answer is (b) 0, 1.
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Q527MHT CET 2024 · 16 MAY · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

To get the truth table shown from the following logic circuit, the logic gate G should be

Figure

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Answer: (c)

  1. Y=A+G(A,B)Y = A + G(A, B) and the table gives Y=1Y = 1 in every row.
  2. When A=0A = 0, G must give 1 for B=0B = 0 and B=1B = 1.
  3. NAND: 0⋅0‾=1\overline{0 \cdot 0} = 1, 0⋅1‾=1\overline{0 \cdot 1} = 1. AND and NOR fail at (0,1)(0,1); OR fails at (0,0)(0,0).
  4. So the answer is (c) NAND.
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Q528MHT CET 2024 · 16 MAY · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The Boolean expression for the given combination of logic gates is

Figure

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Answer: (c)

  1. NOT gate gives Aˉ\bar{A}; AND gate gives B⋅CB \cdot C.
  2. OR gate: Y=Aˉ+(B⋅C)Y = \bar{A} + (B \cdot C).
  3. So the answer is (c).
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Q529MHT CET 2024 · 16 MAY · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

The truth table of the following circuit is

Figure

Figure

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Answer: (c)

  1. A NAND gate with both inputs joined acts as NOT: outputs are Aˉ\bar{A} and Bˉ\bar{B}.
  2. Final NAND: Y=Aˉ⋅Bˉ‾=A+BY = \overline{\bar{A} \cdot \bar{B}} = A + B (De Morgan).
  3. So Y is the OR table: 0,1,1,10, 1, 1, 1 for AB=00,01,10,11AB = 00, 01, 10, 11.
  4. So the answer is (c), the third table.
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Q530MHT CET 2024 · 11 MAY · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

For the following digital logic circuit, the correct truth-table is

Figure

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Answer: (d)

  1. The triangle on A has a bubble, so it is a NOT gate: it gives Aˉ\bar{A}.
  2. NAND gate: Y=Aˉ⋅B‾=A+BˉY = \overline{\bar{A} \cdot B} = A + \bar{B}.
  3. Rows AB=00,01,10,11AB = 00, 01, 10, 11 give Y=1,0,1,1Y = 1, 0, 1, 1.
  4. This is table R, so the answer is (d).
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Q531MHT CET 2024 · 10 MAY · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

What is the output Y in the following circuit, when all the three inputs A, B, C are first 'zero' and then 'one'?

Figure

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Answer: (c)

  1. Y=(A⋅B)⋅C‾Y = \overline{(A \cdot B) \cdot C} (AND, then NAND with C).
  2. All zero: Y=0‾=1Y = \overline{0} = 1.
  3. All one: Y=1‾=0Y = \overline{1} = 0.
  4. So the answer is (c) 1, 0.
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Q532MHT CET 2024 · 9 MAY · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

In the logic circuit diagram, when all the four inputs A,B,C,D\mathrm{A}, \mathrm{B}, \mathrm{C}, \mathrm{D} are one, the outputs Y1,Y2,Y3\mathrm{Y}_1, \mathrm{Y}_2, \mathrm{Y}_3 are respectively (1,1,0)(1, 1, 0). When all the inputs A,B,C,D\mathrm{A}, \mathrm{B}, \mathrm{C}, \mathrm{D} are changed to 'zero', the outputs Y1,Y2,Y3\mathrm{Y}_1, \mathrm{Y}_2, \mathrm{Y}_3 respectively change to

Figure

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Answer: (b)

  1. Y1=A+BY_1 = A + B, Y2=C⋅D‾‾=C⋅DY_2 = \overline{\overline{C \cdot D}} = C \cdot D, Y3=Y1+Y2‾Y_3 = \overline{Y_1 + Y_2}.
  2. Check: all inputs 1 give (1,1,0)(1, 1, 0), as stated.
  3. All inputs 0: Y1=0Y_1 = 0, Y2=0Y_2 = 0, Y3=0+0‾=1Y_3 = \overline{0 + 0} = 1.
  4. So the answer is (b) (0,0,1)(0, 0, 1).
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Q533MHT CET 2024 · 4 MAY · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The truth table for the given logic circuit is

Figure

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Answer: (a)

  1. Upper gate is NOR: A+B‾\overline{A + B}. Lower gate is AND: A⋅BA \cdot B. Final gate is NAND.
  2. Y=A+B‾⋅(A⋅B)‾Y = \overline{\overline{A + B} \cdot (A \cdot B)}.
  3. A+B‾\overline{A + B} and A⋅BA \cdot B can never both be 1, so their product is always 0 and Y=1Y = 1 for all inputs.
  4. Table P has Y = 1 in every row, so the answer is (a) P.
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Q534NEET 2024Medium

Logic Gates · Boolean output of a circuit

The output Y for the inputs A and B of the given logic circuit is:

Figure

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Answer: (c)

  1. A NAND gate with joined inputs is a NOT gate: outputs Aˉ\bar{A} and Bˉ\bar{B}.
  2. Final NAND: Y=Aˉ⋅Bˉ‾=A+BY = \overline{\bar{A} \cdot \bar{B}} = A + B (De Morgan).
  3. So the answer is (c) A+BA + B.
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Q535NEET 2024Medium

Logic Gates · Boolean output of a circuit

A logic circuit provides the output YY as per the following truth table:

Figure

The expression of the output Y is:

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Answer: (c)

  1. From the table, Y=1Y = 1 when B=0B = 0 and Y=0Y = 0 when B=1B = 1, whatever A is.
  2. So Y=BˉY = \bar{B}.
  3. So the answer is (c) Bˉ\bar{B}.
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Q536JEE Main 2024 · 9 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

Figure

In the truth table of the above circuit the value of X and Y are:

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Answer: (a)

  1. Upper AND: ABAB. Lower AND gets Aˉ\bar{A} and Bˉ\bar{B}: AˉBˉ\bar{A}\bar{B}.
  2. E=AB+AˉBˉ‾E = \overline{AB + \bar{A}\bar{B}} (NOR).
  3. A=0,B=1A = 0, B = 1: AB=0AB = 0, AˉBˉ=0⇒X=1\bar{A}\bar{B} = 0 \Rightarrow X = 1.
  4. A=1,B=0A = 1, B = 0: also both terms 0⇒Y=10 \Rightarrow Y = 1.
  5. So the answer is (a) 1, 1.
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Q537JEE Main 2024 · 8 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

The output Y\mathrm{Y} of following circuit for given inputs is:

Figure

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Answer: (d)

  1. OR gate gets AA and Bˉ\bar{B}: A+BˉA + \bar{B}.
  2. Lower AND gets BB and Aˉ\bar{A}: AˉB\bar{A}B.
  3. Y=(A+Bˉ)⋅AˉB=AAˉB+AˉBBˉ=0Y = (A + \bar{B})\cdot \bar{A}B = A\bar{A}B + \bar{A}B\bar{B} = 0.
  4. So the answer is (d) 0.
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Q538JEE Main 2024 · 6 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

The correct truth table for the following logic circuit is:

Figure

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Answer: (b)

  1. OR gate inputs: Aˉ\bar{A} (from the NOT) and ABAB (from the AND).
  2. Y=Aˉ+AB=Aˉ+BY = \bar{A} + AB = \bar{A} + B.
  3. Rows: 00→100 \to 1, 01→101 \to 1, 10→010 \to 0, 11→111 \to 1.
  4. So the answer is (b).
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Q539JEE Main 2024 · 5 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The output (Y) of logic circuit given below is 0 only when:

Figure

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Answer: (a)

  1. Upper OR: A+BA + B. AND gate: B⋅1=BB\cdot 1 = B.
  2. Final OR: Y=(A+B)+B=A+BY = (A + B) + B = A + B.
  3. A+B=0A + B = 0 only when A=0A = 0 and B=0B = 0.
  4. So the answer is (a).
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Q540JEE Main 2024 · 5 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

Following gates section is connected in a complete suitable circuit.

Figure

For which of the following combination, bulb will glow (ON):

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Answer: (b)

  1. NOR with joined inputs is NOT: Aˉ\bar{A} and Dˉ\bar{D}. NAND gives BC‾\overline{BC}.
  2. Middle NOR: Aˉ+BC‾‾=A⋅BC\overline{\bar{A} + \overline{BC}} = A\cdot BC (one bulb terminal).
  3. Other bulb terminal is at Dˉ\bar{D}. Bulb glows only when the two terminals differ.
  4. (a) ABC=1, Dˉ=1ABC = 1,\ \bar{D} = 1: no. (b) ABC=0, Dˉ=1ABC = 0,\ \bar{D} = 1: glows. (c), (d) ABC=0, Dˉ=0ABC = 0,\ \bar{D} = 0: no.
  5. So the answer is (b) A=1,B=0,C=0,D=0A = 1, B = 0, C = 0, D = 0.
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Q541JEE Main 2024 · 31 JAN · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

Figure

The output of the given circuit diagram is -

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Answer: (d)

  1. Upper OR gets AA and Bˉ\bar{B}: A+BˉA + \bar{B}. Lower OR gets BB and Aˉ\bar{A}: Aˉ+B\bar{A} + B.
  2. Y=(A+Bˉ)+(Aˉ+B)‾Y = \overline{(A + \bar{B}) + (\bar{A} + B)}.
  3. (A+Aˉ)+(B+Bˉ)=1(A + \bar{A}) + (B + \bar{B}) = 1, so Y=1ˉ=0Y = \bar{1} = 0 for every input.
  4. So the answer is (d), output 0 in all rows.
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Q542JEE Main 2024 · 29 JAN · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The truth table for this given circuit is:

Figure

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Answer: (b)

  1. Upper AND gets AA and BB: ABAB. Lower AND gets Aˉ\bar{A} and BB: AˉB\bar{A}B.
  2. Y=AB+AˉB=B(A+Aˉ)=BY = AB + \bar{A}B = B(A + \bar{A}) = B.
  3. Output column copies B: 0,1,0,10, 1, 0, 1 for 00,01,10,1100, 01, 10, 11.
  4. So the answer is (b).
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Q543JEE Main 2024 · 27 JAN · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The truth table of the given circuit diagram is:

Figure

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Answer: (a)

  1. Upper AND gets AA and Bˉ\bar{B}; lower AND gets Aˉ\bar{A} and BB.
  2. Y=ABˉ+AˉBY = A\bar{B} + \bar{A}B, the XOR function.
  3. Rows: 00→000 \to 0, 01→101 \to 1, 10→110 \to 1, 11→011 \to 0.
  4. So the answer is (a).
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Q544MHT CET 2024 · 11 MAY · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

Following combination of gates is equivalent to

Figure

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Answer: (d)

  1. First NAND: C=AB‾C = \overline{AB}; middle NANDs give AC‾\overline{AC} and BC‾\overline{BC}.
  2. Output: Y=AC+BC=(A+B)AB‾Y = AC + BC = (A+B)\overline{AB}.
  3. Y=ABˉ+AˉBY = A\bar B + \bar A B, which is 1 only when the inputs differ.
  4. So the answer is (d) X-OR gate.
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Q545MHT CET 2024 · 10 MAY · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

The logic gate represented by following logic circuit is

Figure

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Answer: (d)

  1. NAND gives AB‾\overline{AB}, OR gives A+BA+B.
  2. AND: Y=(A+B)AB‾=(A+B)(Aˉ+Bˉ)=ABˉ+AˉBY = (A+B)\overline{AB} = (A+B)(\bar A + \bar B) = A\bar B + \bar A B.
  3. So the answer is (d) X-OR gate.
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Q546MHT CET 2024 · 9 MAY · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

The resultant gate and its Boolean expression in the given circuit is

Figure

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Answer: (a)

  1. NOR gives A+B‾\overline{A+B}.
  2. NOT inverts it: Y=A+BY = A + B.
  3. So the answer is (a) OR, A+BA + B.
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Q547MHT CET 2024 · 2 MAY · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

The logic gate combination circuit shown in the figure performs the logic function of

Figure

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Answer: (c)

  1. Upper AND gets AA and Bˉ\bar B: output ABˉA\bar B.
  2. Lower AND gets Aˉ\bar A and BB: output AˉB\bar A B.
  3. OR: Y=ABˉ+AˉBY = A\bar B + \bar A B.
  4. So the answer is (c) XOR gate.
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Q548MHT CET 2024 · 2 MAY · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

The logic circuit in figure is equivalent to

Figure

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Answer: (d)

  1. NAND gives AB‾\overline{AB}.
  2. NOR with inputs tied acts as NOT: ABAB.
  3. Final NOT: Y=AB‾Y = \overline{AB}.
  4. So the answer is (d) NAND gate.
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Q549NEET 2024Medium

Logic Gates · Equivalent gate & universal gates

The output ( YY) of the given logic gate is similar to the output of an/a

Figure

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Answer: (d)

  1. Tied NAND on AA gives Aˉ\bar A; tied NOR on BB gives Bˉ\bar B.
  2. Final NOR: Y=Aˉ+Bˉ‾=ABY = \overline{\bar A + \bar B} = AB.
  3. So the answer is (d) AND gate.
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Q550JEE Main 2024 · 4 APR · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

Identify the logic gate given in the circuit:

Figure

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Answer: (a)

  1. NOT gates give Aˉ\bar A and Bˉ\bar B; the output gate is a NAND (bubble at output).
  2. Y=Aˉ⋅Bˉ‾=A+BY = \overline{\bar A \cdot \bar B} = A + B.
  3. So the answer is (a) OR gate.
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Q551JEE Main 2024 · 31 JAN · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

Identify the logic operation performed by the given circuit.

Figure

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Answer: (c)

  1. NOT gates give Aˉ\bar A and Bˉ\bar B.
  2. NAND: Y=AˉBˉ‾=A+BY = \overline{\bar A \bar B} = A + B.
  3. So the answer is (c) OR.
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Q552MHT CET 2023 · 13 MAY · SHIFT 1Easy

Logic Gates · NAND, NOR & XOR

If two inputs of a NAND gate are shorted, the resulting gate is

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Answer: (c)

  1. Shorting the inputs makes B=AB = A.
  2. Y=A⋅A‾=A‾Y = \overline{A \cdot A} = \overline{A}.
  3. So the answer is (c) a NOT gate.
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Q553MHT CET 2023 · 11 MAY · SHIFT 1Easy

Logic Gates · NAND, NOR & XOR

In the case of NAND gate, if A and B are the inputs and Y\mathrm{Y} is the output then

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Answer: (d)

  1. NAND = AND followed by NOT.
  2. Y=A⋅B‾Y = \overline{A \cdot B}.
  3. So the answer is (d).
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Q554MHT CET 2023 · 10 MAY · SHIFT 2Medium

Logic Gates · NAND, NOR & XOR

The output of an 'OR' gate is connected to both the inputs of a 'NAND' gate. The combination will serve as

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Answer: (c)

  1. OR output: A+BA + B.
  2. NAND with both inputs tied together acts as NOT: Y=(A+B)⋅(A+B)‾=A+B‾Y = \overline{(A + B) \cdot (A + B)} = \overline{A + B}.
  3. So the answer is (c) NOR gate.
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Q555JEE Main 2023 · 13 APR · SHIFT 2Medium

Logic Gates · NAND, NOR & XOR

The output from NAND gate having inputs A and B given below will be,

Figure

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Answer: (b)

  1. NAND output is 0 only when A=1A = 1 and B=1B = 1; otherwise 1.
  2. Intervals (AA, BB): (1,1),(0,0),(0,1),(1,0),(1,1),(0,0),(0,1)(1,1), (0,0), (0,1), (1,0), (1,1), (0,0), (0,1).
  3. Output: 0,1,1,1,0,1,10, 1, 1, 1, 0, 1, 1.
  4. Waveform: LOW, then HIGH for three intervals, LOW for one, then HIGH.
  5. So the answer is (b).
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Q556MHT CET 2023 · 14 MAY · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The output of following combination is same as that of

Figure

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Answer: (d)

  1. Both NOR gates receive A and B, so each gives A+B‾\overline{A + B}.
  2. OR gate: Y=A+B‾+A+B‾=A+B‾Y = \overline{A + B} + \overline{A + B} = \overline{A + B}.
  3. So the answer is (d) NOR gate.
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Q557MHT CET 2023 · 13 MAY · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The Boolean expression for the following combination is

Figure

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Answer: (c)

  1. Upper AND gets Aˉ\bar{A} and BB: output Aˉ⋅B\bar{A} \cdot B.
  2. Lower AND gets AA and Bˉ\bar{B}: output A⋅BˉA \cdot \bar{B}.
  3. OR gate: Y=(Aˉ⋅B)+(A⋅Bˉ)Y = (\bar{A} \cdot B) + (A \cdot \bar{B}) (XOR).
  4. So the answer is (c).
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Q558MHT CET 2023 · 12 MAY · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

In the following digital logic circuit, the output Y will be '1' for inputs

Figure

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Answer: (d)

  1. Upper gate: P=A⋅B‾P = \overline{A \cdot B}. Lower gate: Q=Aˉ+B‾Q = \overline{\bar{A} + B}.
  2. Final NOR: Y=1Y = 1 only when P=0P = 0 and Q=0Q = 0.
  3. P=0P = 0 needs A=B=1A = B = 1; then Q=0+1‾=0Q = \overline{0 + 1} = 0.
  4. So the answer is (d) A=1,B=1A = 1, B = 1.
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Q559MHT CET 2023 · 11 MAY · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

In the digital circuit the inputs are as shown in figure. The Boolean expression for output Y\mathrm{Y} is

Figure

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Answer: (c)

  1. NAND gate gives A⋅B‾\overline{A \cdot B}; NOT gate gives C‾\overline{C}.
  2. OR gate: Y=A⋅B‾+C‾Y = \overline{A \cdot B} + \overline{C}.
  3. So the answer is (c).
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Q560MHT CET 2023 · 10 MAY · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

To obtain the truth-table shown, from the following logic circuit, the gate G should be

Figure

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Answer: (d)

  1. Y=A+G(A,B)Y = A + G(A, B). Rows with A=1A = 1 give 1 automatically.
  2. For A=0A = 0 the table needs G(0,0)=1G(0,0) = 1 and G(0,1)=0G(0,1) = 0.
  3. NOR: 0+0‾=1\overline{0 + 0} = 1, 0+1‾=0\overline{0 + 1} = 0. NAND gives 1 at (0,1)(0,1); AND and OR give 0 at (0,0)(0,0).
  4. So the answer is (d) NOR.
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Q561MHT CET 2023 · 9 MAY · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

To get the truth table shown, from the following logic circuit, the Gate G should be

Figure

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Answer: (b)

  1. Y=A+G(A,B)Y = A + G(A, B) and the table shows Y=AY = A.
  2. So for A=0A = 0, G must give 0 for both B=0B = 0 and B=1B = 1.
  3. Only AND does this (0⋅B=00 \cdot B = 0).
  4. So the answer is (b) AND.
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Q562NEET 2023Medium

Logic Gates · Boolean output of a circuit

For the following logic circuit, the truth table is:

Figure

Figure

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Answer: (a)

  1. NOT gates give Aˉ\bar{A} and Bˉ\bar{B}.
  2. NAND gate: Y=Aˉ⋅Bˉ‾=A+BY = \overline{\bar{A} \cdot \bar{B}} = A + B (De Morgan).
  3. OR table: Y=0,1,1,1Y = 0, 1, 1, 1 for AB=00,01,10,11AB = 00, 01, 10, 11.
  4. So the answer is (a), the first table.
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Q563JEE Main 2023 · 13 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

For the following circuit and given inputs A and B, choose the correct option for output 'YY'

Figure

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Answer: (d)

  1. NOR with joined inputs gives Aˉ\bar{A}; OR with joined inputs gives BB.
  2. Y=AˉB‾=A+BˉY = \overline{\bar{A}B} = A + \bar{B}, so Y=0Y = 0 only when A=0,B=1A = 0, B = 1.
  3. From the waveforms, A=0,B=1A = 0, B = 1 only between t1t_1 and t2t_2.
  4. So Y=1Y = 1 everywhere except 00 from t1t_1 to t2t_2. So the answer is (d).
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Q564JEE Main 2023 · 30 JAN · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The output YY for the inputs AA and BB of circuit is given by

Figure

Truth table of the shown circuit is:

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Answer: (a)

  1. First NAND: N=AB‾N = \overline{AB}.
  2. Next NANDs: AN‾\overline{A N} and BN‾\overline{B N}; final Y=AN+BN=(A+B)AB‾Y = AN + BN = (A + B)\overline{AB}.
  3. (A+B)(Aˉ+Bˉ)=ABˉ+AˉB(A + B)(\bar{A} + \bar{B}) = A\bar{B} + \bar{A}B, the XOR gate.
  4. Rows: 00→000 \to 0, 01→101 \to 1, 10→110 \to 1, 11→011 \to 0. So the answer is (a).
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Q565JEE Main 2023 · 29 JAN · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

For the given logic gates combination, the correct truth table will be

Figure

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Answer: (d)

  1. Upper AND gets Aˉ\bar{A} and BB; lower AND gets AA and Bˉ\bar{B}.
  2. X=AˉB+ABˉX = \bar{A}B + A\bar{B}, the XOR function.
  3. Rows: 00→000 \to 0, 01→101 \to 1, 10→110 \to 1, 11→011 \to 0.
  4. So the answer is (d).
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Q566MHT CET 2023 · 12 MAY · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

The following logic gate combination is equivalent to

Figure

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Answer: (c)

  1. OR gives A+BA+B, NAND gives AB‾\overline{AB}.
  2. AND: Y=(A+B)AB‾=ABˉ+AˉBY = (A+B)\overline{AB} = A\bar B + \bar A B.
  3. So the answer is (c) XOR gate.
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Q567MHT CET 2023 · 12 MAY · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

The logic gate combination circuit shown in the figure performs the logic function of

Figure

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Answer: (a)

  1. NAND output: AB‾\overline{AB}.
  2. An AND gate with a single (or tied) input passes it unchanged: X⋅X=XX \cdot X = X.
  3. Y=AB‾Y = \overline{AB}, which is NAND.
  4. The key gives (a) AND.
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Q568NEET 2023Medium

Logic Gates · Equivalent gate & universal gates

The given circuit is equivalent to:

Figure

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Answer: (d)

  1. NOT gates give Aˉ\bar A and Bˉ\bar B.
  2. NOR: Y=Aˉ+Bˉ‾=ABY = \overline{\bar A + \bar B} = AB (De Morgan).
  3. This is the AND gate drawn in option (d).
  4. So the answer is (d).
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Q569JEE Main 2023 · 11 APR · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

The logic operations performed by the given digital circuit is equivalent to:

Figure

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Answer: (b)

  1. OR gives A+BA+B; AND gives ABAB.
  2. NAND: (A+B)AB‾=AB‾\overline{(A+B)AB} = \overline{AB} since (A+B)AB=AB(A+B)AB = AB.
  3. Final NOT: Y=ABY = AB.
  4. So the answer is (b) AND.
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Q570JEE Main 2023 · 11 APR · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

The logic performed by the circuit shown in figure is equivalent to:

Figure

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Answer: (b)

  1. Tied NORs act as NOT: aˉ\bar a, bˉ\bar b.
  2. Final NOR: Y=aˉ+bˉ‾=abY = \overline{\bar a + \bar b} = ab.
  3. So the answer is (b) AND.
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Q571JEE Main 2023 · 6 APR · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

Name the logic gate equivalent to the diagram attached

Figure

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Answer: (a)

  1. Switches AA and BB are in parallel, and the LED is connected across them.
  2. Closing either switch shorts the LED, so it does not glow (Y=0Y = 0).
  3. LED glows only when both switches are open: Y=A+B‾Y = \overline{A+B}.
  4. So the answer is (a) NOR.
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Q572JEE Main 2023 · 24 JAN · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

Figure

The logic gate equivalent to the given circuit diagram is:

Show answer and solution

Answer: (c)

  1. Switches A1A_1 and B1B_1 are in series, and this branch is across the LED.
  2. Only when both are closed is the LED shorted (Y=0Y = 0).
  3. Otherwise it glows: Y=AB‾Y = \overline{AB}.
  4. So the answer is (c) NAND.
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Q573JEE Main 2023 · 8 APR · SHIFT 1Medium

Logic Gates · Waveforms

For the logic circuit shown, the output waveform at Y\mathrm{Y} is:

Figure

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Answer: (b)

  1. NAND with joined inputs is NOT, so the last NAND gives Y=Aˉ Bˉ‾=A+BY = \overline{\bar{A}\,\bar{B}} = A + B (OR).
  2. 0–1: A=0,B=0⇒Y=0A=0, B=0 \Rightarrow Y=0; 1–2: B=1⇒Y=1B=1 \Rightarrow Y=1; 2–4: A=1⇒Y=1A=1 \Rightarrow Y=1.
  3. So YY is low up to t=1t=1 and high after that: the answer is (b).
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Q574JEE Main 2023 · 30 JAN · SHIFT 1Medium

Logic Gates · Waveforms

The output waveform of the given logical circuit for the following inputs A and B as shown below, is:

Figure

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Answer: (d)

  1. NAND with joined inputs is NOT, so Y=Aˉ Bˉ‾=A+BY = \overline{\bar{A}\,\bar{B}} = A + B (OR).
  2. AA is high for t1t_1–t3t_3 and t5t_5–t6t_6; BB is high for t2t_2–t4t_4 and after t6t_6.
  3. Both are low only before t1t_1 and between t4t_4 and t5t_5, so Y=0Y=0 there and Y=1Y=1 elsewhere.
  4. So the answer is (d).
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Q575MHT CET 2022 · 11 AUG · SHIFT 2Easy

Logic Gates · NAND, NOR & XOR

For a NAND gate, the inputs and outputs are given below.

Figure

The values taken by C, D, E, F are respectively

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Answer: (b)

  1. NAND: Y=A⋅B‾Y = \overline{A \cdot B}, which is 0 only when both inputs are 1.
  2. CC: (0,1)→1(0,1) \to 1; DD: (0,0)→1(0,0) \to 1; EE: (1,0)→1(1,0) \to 1; FF: (1,1)→0(1,1) \to 0.
  3. So the answer is (b) 1, 1, 1, 0.
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Q576JEE Main 2022 · 27 JUL · SHIFT 1Easy

Logic Gates · Waveforms

A logic gate circuit has two inputs A and B and output Y. The voltage waveforms of A, B and Y are shown below.

Figure

The logic gate circuit is:

Show answer and solution

Answer: (a)

  1. First AA pulse: BB is also HIGH, so Y=1Y = 1.
  2. Second AA pulse: BB is LOW, so Y=0Y = 0; when only BB is HIGH, Y=0Y = 0.
  3. Third AA pulse: BB is HIGH, so Y=1Y = 1.
  4. Y=1Y = 1 only when both are 1: Y=A⋅BY = A \cdot B.
  5. So the answer is (a) AND gate.
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Q577NEET 2022 · PHASE 1Medium

Logic Gates · Boolean output of a circuit

Figure

The truth table for the given logic circuit is

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Answer: (c)

  1. Upper NAND: A⋅B‾\overline{A \cdot B}. Lower NAND gets Aˉ\bar{A} and B: Aˉ⋅B‾\overline{\bar{A} \cdot B}.
  2. C=A⋅B‾⋅Aˉ⋅B‾C = \overline{A \cdot B} \cdot \overline{\bar{A} \cdot B}.
  3. AB=00AB = 00: 1⋅1=11 \cdot 1 = 1; 0101: 1⋅0=01 \cdot 0 = 0; 1010: 1⋅1=11 \cdot 1 = 1; 1111: 0⋅1=00 \cdot 1 = 0. So C=BˉC = \bar{B}.
  4. Table 1,0,1,01, 0, 1, 0, so the answer is (c).
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Q578JEE Main 2022 · 25 JUL · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

In the circuit, the logical value of A=1A = 1 or B=1B = 1 when potential at AA or BB is 5 V5\text{ V} and the logical value of A=0A = 0 or B=0B = 0 when potential at AA or BB is 0 V0\text{ V}.

Figure

The truth table of the given circuit will be:

Show answer and solution

Answer: (a)

  1. Diode cathodes face the inputs; Y is pulled up to 5 V through R.
  2. If A or B is at 0 V, that diode conducts and pulls Y to about 0 V, so Y=0Y = 0.
  3. Only when both A and B are at 5 V do both diodes stay off, so Y=1Y = 1: AND gate.
  4. Table: 00→000 \to 0, 10→010 \to 0, 01→001 \to 0, 11→111 \to 1. So the answer is (a).
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Q579JEE Main 2022 · 28 JUN · SHIFT 1MediumOld syllabus

Logic Gates · Boolean output of a circuit

In the following circuit, the correct relation between output (Y) and inputs A and B will be:

Figure

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Answer: (c)

  1. Diode cathodes face A and B; X is pulled up by the 10 V supply through R.
  2. X is high only when both A and B are high (diode AND): X=ABX = AB.
  3. The npn transistor in CE mode inverts: X high saturates it and Y falls to 0.
  4. Y=AB‾Y = \overline{AB}. So the answer is (c).
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Q580NEET 2022 · PHASE 2Medium

Logic Gates · Equivalent gate & universal gates

Figure

Identify the equivalent logic gate represented by the given circuit

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Answer: (b)

  1. The LED is in series with the two switches, which are in parallel between LED and ground.
  2. Current flows (LED glows, Y=1Y=1) when either switch is closed.
  3. Y=0Y = 0 only when both switches are open: Y=A+BY = A + B.
  4. So the answer is (b) OR.
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Q581JEE Main 2022 · 27 JUN · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

Identify the correct Logic Gate for the following output (Y) of two inputs A and B.

Figure

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Answer: (b)

  1. Read the waveform: Y=0Y = 0 only in the intervals where A=1A = 1 and B=1B = 1.
  2. For (0,0),(0,1),(1,0)(0,0), (0,1), (1,0) the output is 1, so Y=AB‾Y = \overline{AB} (NAND).
  3. Option (b) is an AND gate followed by NOT, i.e. NAND.
  4. So the answer is (b).
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Q582JEE Main 2022 · 25 JUN · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

Identify the logic operation performed by the given circuit:

Figure

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Answer: (a)

  1. Tied NORs act as NOT: Aˉ\bar A, Bˉ\bar B.
  2. Final NOR: Y=Aˉ+Bˉ‾=ABY = \overline{\bar A + \bar B} = AB.
  3. So the answer is (a) AND gate.
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Q583MHT CET 2021 · 23 SEP · SHIFT 2Easy

Logic Gates · Basic gates & truth tables

For a two input AND gate, the four entries are shown in the truth table. Identify the correct ones out of these (A,B=(\mathrm{A}, \mathrm{B} = input, Y=\mathrm{Y} = output)

Figure

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Answer: (b)

  1. AND output is 1 only when both inputs are 1.
  2. Entry 1: (0, 1) → 0 correct; entry 2: (1, 0) → 0 correct; entry 3: (1, 1) → 1 correct.
  3. Entry 4: (0, 0) → 1 is wrong (should be 0).
  4. So the answer is (b) 1, 2 and 3 only.
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Q584MHT CET 2021 · 22 SEP · SHIFT 2Easy

Logic Gates · Basic gates & truth tables

Which of the following gates will give an output '1' for the given inputs?

Figure

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Answer: (d)

  1. (I) NAND with (1, 1): 00
  2. (II) NOR with (0, 0): 0+0‾=1\overline{0 + 0} = 1
  3. (III) AND with (0, 1): 00; (IV) XOR with (1, 0): 11
  4. So the answer is (d) II and IV.
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Q585MHT CET 2021 · 20 SEP · SHIFT 2Easy

Logic Gates · Basic gates & truth tables

The output of an 'OR' gate is 'one'

Show answer and solution

Answer: (d)

  1. OR: Y=A+BY = A + B is 1 if at least one input is 1.
  2. So the answer is (d) if either or both inputs are 'one'.
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Q586MHT CET 2021 · 20 SEP · SHIFT 1Easy

Logic Gates · Basic gates & truth tables

Two different logic gates moving output '0' for the inputs (0, 1) and then for (1, 0) are

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Answer: (d)

  1. For (0, 1) and (1, 0): AND gives 0, NOR gives 0, OR gives 1, NAND gives 1.
  2. So the two gates are NOR and AND: answer (d).
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Q587MHT CET 2021 · 22 SEP · SHIFT 1Easy

Logic Gates · NAND, NOR & XOR

A logic gate which gives output 'HIGH' only when its two input terminals are at different logic levels with respect to each other is

Show answer and solution

Answer: (d)

  1. Output HIGH only when inputs differ: (0,1)(0,1) or (1,0)(1,0).
  2. This is Y=A⊕BY = A \oplus B.
  3. So the answer is (d) X-OR gate.
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Q588JEE Main 2021 · 26 AUG · SHIFT 2Medium

Logic Gates · NAND, NOR & XOR

Four NOR gates are connected as shown in figure. The truth table for the given figure is:

Figure

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Answer: (d)

  1. Gate 1: N=A+B‾N = \overline{A + B}.
  2. Gate 2: P=A+N‾P = \overline{A + N}; gate 3: Q=B+N‾Q = \overline{B + N}.
  3. Check rows: (0,0)(0,0): N=1,P=0,Q=0,Y=0+0‾=1N = 1, P = 0, Q = 0, Y = \overline{0 + 0} = 1.
  4. (0,1)(0,1): N=0,P=1,Q=0,Y=0N = 0, P = 1, Q = 0, Y = 0; (1,0)(1,0): N=0,P=0,Q=1,Y=0N = 0, P = 0, Q = 1, Y = 0; (1,1)(1,1): N=0,P=0,Q=0,Y=1N = 0, P = 0, Q = 0, Y = 1.
  5. YY = 1, 0, 0, 1 (XNOR), so the answer is (d).
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Q589MHT CET 2021 · 24 SEP · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

For the output of the following logic circuit to be '1', the values of inputs A and B should be respectively

Figure

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Answer: (b)

  1. OR followed by NOT is a NOR gate: Y=A+B‾Y = \overline{A + B}.
  2. Y=1Y = 1 only when A+B=0A + B = 0, i.e. A=0,B=0A = 0, B = 0.
  3. So the answer is (b) 0 and 0.
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Q590NEET 2021Medium

Logic Gates · Boolean output of a circuit

For the given circuit, the input digital signals are applied at the terminals A, B and C. What would be the output at the terminal y?

Figure

Figure

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Answer: (c)

  1. y=A⋅B+B⋅C‾y = A \cdot B + \overline{B \cdot C} (AND, NAND, then OR).
  2. Before t2t_2: B=0B = 0, so B⋅C‾=1\overline{B \cdot C} = 1 and y=1y = 1.
  3. t2t_2 to t3t_3: C=0C = 0, so the NAND gives 1; t3t_3 to t4t_4: A=B=1A = B = 1, so A⋅B=1A \cdot B = 1.
  4. After t4t_4: B=0B = 0 again, so y=1y = 1. Thus y stays at 5 V all the time.
  5. So the answer is (c).
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Q591JEE Main 2021 · 31 AUG · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

In the following logic circuit the sequence of the inputs A, B are (0, 0), (0, 1), (1, 0) and (1, 1). The output Y for this sequence will be:

Figure

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Answer: (c)

  1. P=ABP = AB, Q=A+BQ = A + B, Y=PQ‾=AB(A+B)‾=AB‾Y = \overline{PQ} = \overline{AB(A + B)} = \overline{AB}.
  2. So Y is NAND of A and B: 00 only for (1,1)(1, 1).
  3. Sequence (0,0),(0,1),(1,0),(1,1)(0,0), (0,1), (1,0), (1,1) gives 1,1,1,01, 1, 1, 0.
  4. So the answer is (c).
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Q592JEE Main 2021 · 17 MAR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

Which one of the following will be the output of the given circuit?

Figure

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Answer: (a)

  1. AND then NOT: AB‾\overline{AB}. OR gate: A+BA + B.
  2. Y=AB‾ (A+B)=(Aˉ+Bˉ)(A+B)=ABˉ+AˉBY = \overline{AB}\,(A + B) = (\bar{A} + \bar{B})(A + B) = A\bar{B} + \bar{A}B.
  3. This is the XOR function.
  4. So the answer is (a) XOR gate.
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Q593JEE Main 2021 · 25 FEB · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

The truth table for the following logic circuit is:

Figure

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Answer: (d)

  1. Upper AND gets AA and Bˉ\bar{B}; lower AND gets Aˉ\bar{A} and BB.
  2. Y=ABˉ+AˉB‾Y = \overline{A\bar{B} + \bar{A}B} (NOR), which is XNOR.
  3. Rows: 00→100 \to 1, 01→001 \to 0, 10→010 \to 0, 11→111 \to 1.
  4. So the answer is (d).
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Q594JEE Main 2021 · 16 MAR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

In the logic circuit shown in the figure, if input A and B are 0 and 1 respectively, the output at Y would be 'x'.

The value of x is ____________.

Figure

Numerical answer type. Work it out, then open the answer.

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Answer: 0

  1. NOR gate gets AA and BB (B inverted twice): A+B‾\overline{A + B}.
  2. NAND gate gets Aˉ\bar{A} and Bˉ\bar{B}: AˉBˉ‾=A+B\overline{\bar{A}\bar{B}} = A + B.
  3. Y=A+B‾⋅(A+B)=0Y = \overline{A + B}\cdot(A + B) = 0 for all inputs.
  4. For A=0,B=1A = 0, B = 1: Y=0Y = 0. So x=0x = 0.
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Q595MHT CET 2021 · 23 SEP · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

The resultant gate and its Boolean expression in the given circuit is

Figure

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Answer: (b)

  1. NOT gates give C=AˉC = \bar A, D=BˉD = \bar B.
  2. NOR: Y=Aˉ+Bˉ‾=A⋅BY = \overline{\bar A + \bar B} = A \cdot B (De Morgan).
  3. So the answer is (b) AND, A⋅BA \cdot B.
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Q596MHT CET 2021 · 21 SEP · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

Combination of NAND gates is shown in the figure. It is equivalent to

Figure

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Answer: (c)

  1. A NAND with tied inputs is a NOT: y1=Aˉy_1 = \bar A, y2=Bˉy_2 = \bar B.
  2. Final NAND: y=Aˉ⋅Bˉ‾=A+By = \overline{\bar A \cdot \bar B} = A + B.
  3. So the answer is (c) OR gate.
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Q597JEE Main 2021 · 26 AUG · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

Identify the logic operation carried out by the given circuit :-

Figure

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Answer: (c)

  1. Tied NANDs act as NOT: X=AˉX = \bar A, Y=BˉY = \bar B.
  2. AND: Z=AˉBˉ=A+B‾Z = \bar A \bar B = \overline{A+B} (De Morgan).
  3. So the answer is (c) NOR.
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Q598JEE Main 2021 · 27 JUL · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

Find the truth table for the function Y of A and B represented in the following figure.

Figure

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Answer: (b)

  1. AND gives ABAB; NOT gives Bˉ\bar B.
  2. OR: Y=AB+Bˉ=A+BˉY = AB + \bar B = A + \bar B.
  3. Table: 00→1, 01→0, 10→1, 11→100 \to 1,\ 01 \to 0,\ 10 \to 1,\ 11 \to 1.
  4. So the answer is (b).
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Q599JEE Main 2021 · 25 JUL · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

Identify the logic operation carried out.

Figure

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Answer: (b)

  1. A NAND gate with both inputs joined acts as NOT, so the inputs to the NOR gate are Aˉ\bar{A} and Bˉ\bar{B}.
  2. Y=Aˉ+Bˉ‾=A⋅BY = \overline{\bar{A} + \bar{B}} = A \cdot B (De Morgan).
  3. So the answer is (b) AND.
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Q600JEE Main 2021 · 17 MAR · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

The output of the given combination gates represents:

Figure

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Answer: (c)

  1. A NOR gate with both inputs joined acts as NOT, so the first two gates give Aˉ\bar{A} and Bˉ\bar{B}.
  2. Middle NOR: Aˉ+Bˉ‾=AB\overline{\bar{A} + \bar{B}} = AB.
  3. Last NOR (as NOT): Y=AB‾Y = \overline{AB}.
  4. So the answer is (c) NAND gate.
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Q601JEE Main 2021 · 16 MAR · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

The following logic gate is equivalent to:

Figure

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Answer: (a)

  1. NAND with joined inputs is NOT, so the middle NAND receives Aˉ\bar{A} and Bˉ\bar{B}.
  2. Middle NAND: Aˉ Bˉ‾=A+B\overline{\bar{A}\,\bar{B}} = A + B.
  3. Last NAND (as NOT): Y=A+B‾Y = \overline{A + B}.
  4. So the answer is (a) NOR gate.
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Q602JEE Main 2021 · 26 FEB · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

Draw the output signal Y in the given combination of gates.

Figure

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Answer: (a)

  1. NAND with joined inputs gives Aˉ\bar{A}; OR gives Aˉ+B\bar{A} + B; NOT gives Y=Aˉ+B‾=ABˉY = \overline{\bar{A} + B} = A\bar{B}.
  2. So Y=1Y = 1 only when A=1A = 1 and B=0B = 0.
  3. 0–1 s: A=1,B=0⇒Y=1A=1, B=0 \Rightarrow Y=1; 1–2 s: B=1⇒Y=0B=1 \Rightarrow Y=0; 2–3 s: A=0⇒Y=0A=0 \Rightarrow Y=0; 3–4 s: B=1⇒Y=0B=1 \Rightarrow Y=0; 4–5 s: A=1,B=0⇒Y=1A=1, B=0 \Rightarrow Y=1.
  4. So the answer is (a): high for 0–1 s and 4–5 s.
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Q603JEE Main 2021 · 24 FEB · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

Figure

The logic circuit shown above is equivalent to:

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Answer: (d)

  1. OR gate inputs are AA and Bˉ\bar{B}, then NOT: C=A+Bˉ‾C = \overline{A + \bar{B}}.
  2. De Morgan: C=Aˉ⋅BC = \bar{A} \cdot B.
  3. This is an AND gate with AA passed through a NOT gate.
  4. So the answer is (d).
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Q604JEE Main 2021 · 31 AUG · SHIFT 2MediumOld syllabus

Logic Gates · Equivalent gate & universal gates

If VA and VB are the input voltages (either 5V or 0V) and V0 is the output voltage then the two gates represented in the following circuit (A) and (B) are :-

Figure

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Answer: (b)

  1. Circuit (A): if either VAV_A or VBV_B is 5 V, that diode conducts and V0≈5V_0 \approx 5 V; only when both are 0 V is V0=0V_0 = 0. This is OR.
  2. Circuit (B): VB=5V_B = 5 V drives the npn transistor into saturation, so V0≈0V_0 \approx 0; VB=0V_B = 0 cuts it off, so V0=5V_0 = 5 V. This is NOT.
  3. So the answer is (b) OR and NOT Gate.
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Q605NEET 2020 · PHASE 2Easy

Logic Gates · Equivalent gate & universal gates

Which of the following gate is called universal gate?

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Answer: (d)

  1. NAND (and NOR) are universal gates: AND, OR and NOT can all be built from them alone.
  2. So the answer is (d) NAND gate.
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Q606NEET 2020 · PHASE 1Medium

Logic Gates · Boolean output of a circuit

For the logic circuit shown, the truth table is:

Figure

Figure

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Answer: (d)

  1. NOT gates give Aˉ\bar{A} and Bˉ\bar{B}; the NOR gate gives Y=Aˉ+Bˉ‾Y = \overline{\bar{A} + \bar{B}}.
  2. By De Morgan, Y=A⋅BY = A \cdot B (AND).
  3. AND table: Y=0,0,0,1Y = 0, 0, 0, 1 for AB=00,01,10,11AB = 00, 01, 10, 11.
  4. So the answer is (d), the fourth table.
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Q607JEE Main 2020 · 2 SEP · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

In the following digital circuit, what will be the output at ‘Z’, when the

input (A, B) are (1, 0), (0, 0), (1, 1,), (0, 1)

Figure

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Answer: (d)

  1. NAND: P=AB‾P = \overline{AB}. OR: A+BA + B. AND: P(A+B)=ABˉ+AˉBP(A + B) = A\bar{B} + \bar{A}B.
  2. Z=P+(ABˉ+AˉB)‾Z = \overline{P + (A\bar{B} + \bar{A}B)}. If P=1P = 1, Z=0Z = 0.
  3. P=1P = 1 for (1,0),(0,0),(0,1)(1,0), (0,0), (0,1), so Z = 0 there.
  4. For (1,1)(1,1): P=0P = 0 and XOR =0= 0, so Z=1Z = 1.
  5. Output: 0,0,1,00, 0, 1, 0. So the answer is (d).
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Q608JEE Main 2020 · 8 JAN · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

In the given circuit, value of Y is:

Figure

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Answer: (d)

  1. Input 1 through NOT gives 0. Top NAND: 0⋅0‾=1\overline{0\cdot 0} = 1.
  2. Second NOT gives 1 to the middle NAND.
  3. Bottom NAND gets 0 and the top NAND output 1: 0⋅1‾=1\overline{0\cdot 1} = 1.
  4. Middle NAND: 1⋅1‾=0\overline{1\cdot 1} = 0, and this drives Y.
  5. So the answer is (d) Y=0Y = 0.
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Q609JEE Main 2020 · 8 JAN · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

Boolean relation at the output stage-Y for the following circuit is:

Figure

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Answer: (c)

  1. Switches with diodes from the 5 V supply act as an OR gate at the base: base high if A or B is closed.
  2. Base high saturates the transistor, so collector (output) falls to 0; base low gives output 1.
  3. Y=A+B‾=A‾⋅B‾Y = \overline{A + B} = \overline{A}\cdot\overline{B} (NOR).
  4. So the answer is (c).
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Q610JEE Main 2020 · 6 SEP · SHIFT 1Medium

Logic Gates · Equivalent gate & universal gates

Identify the correct output signal Y in the given combination of gates (as shown) for the given inputs A and B.

Figure

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Answer: (d)

  1. Y=Aˉ⋅Bˉ‾=A+BY = \overline{\bar{A} \cdot \bar{B}} = A + B, an OR gate.
  2. So YY is high whenever either AA or BB is high.
  3. B is high during 0–7.5, 10–15 and 17.5–22.5, and every A pulse lies inside these intervals, so YY follows these intervals.
  4. So the answer is (d).
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Q611JEE Main 2020 · 4 SEP · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

Identify the operation performed by the circuit given below:

Figure

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Answer: (a)

  1. Each NOR with joined inputs acts as NOT, giving Aˉ,Bˉ,Cˉ\bar{A}, \bar{B}, \bar{C}.
  2. Final NOR: Y=Aˉ+Bˉ+Cˉ‾=ABCY = \overline{\bar{A} + \bar{B} + \bar{C}} = ABC.
  3. So the answer is (a) AND.
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Q612JEE Main 2020 · 7 JAN · SHIFT 1Difficult

Logic Gates · Basic gates & truth tables

Which of the following gives a reversible operation?

Show answer and solution

Answer: (b)

  1. A reversible gate lets the input be found uniquely from the output, so it needs a one-to-one input–output map.
  2. Two-input NOR, OR and NAND give the same output for several input combinations, so the input cannot be recovered.
  3. A NOR gate with both inputs joined is a NOT gate: 0→10 \to 1, 1→01 \to 0, which is one-to-one.
  4. So the answer is (b).
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Q613JEE Main 2019 · 12 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

The truth table for the circuit given in the fig. is:

Figure

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Answer: (c)

  1. OR gives A+BA + B; NAND gets AA and A+BA + B.
  2. Y=A(A+B)‾=A‾Y = \overline{A(A + B)} = \overline{A}.
  3. Rows: 00→100 \to 1, 01→101 \to 1, 10→010 \to 0, 11→011 \to 0.
  4. So the answer is (c).
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Q614JEE Main 2019 · 12 JAN · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

The output of the given logic circuit is:

Figure

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Answer: (d)

  1. First NAND: N=AB‾N = \overline{AB}. Top NAND: AN‾\overline{A N}.
  2. OR gate: N+B=Aˉ+Bˉ+B=1N + B = \bar{A} + \bar{B} + B = 1.
  3. Final NAND: Y=AN‾⋅1‾=AN=A(Aˉ+Bˉ)=ABˉY = \overline{\overline{AN}\cdot 1} = AN = A(\bar{A} + \bar{B}) = A\bar{B}.
  4. So the answer is (d) AB‾A\overline{B}.
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Q615JEE Main 2019 · 10 JAN · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

To get output 1 at R, for the given logic gate circuit the input values must be

Figure

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Answer: (b)

  1. OR gate gets xˉ\bar{x} and yy: P=xˉ+yP = \bar{x} + y.
  2. NAND gets xx and yˉ\bar{y}: Q=xyˉ‾=xˉ+yQ = \overline{x\bar{y}} = \bar{x} + y.
  3. R=P+Q‾=xˉ+y‾=xyˉR = \overline{P + Q} = \overline{\bar{x} + y} = x\bar{y}.
  4. R=1R = 1 only when x=1,y=0x = 1, y = 0. So the answer is (b).
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Q616NEET 2019Medium

Logic Gates · Equivalent gate & universal gates

The circuit diagram shown here corresponds to the logic gate,

Figure

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Answer: (b)

  1. Switches AA and BB are in parallel and connect the LED point directly to ground.
  2. If either switch is closed the LED is shorted and does not glow (Y=0Y=0).
  3. LED glows only when both are open: Y=A+B‾Y = \overline{A+B}.
  4. So the answer is (b) NOR.
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Q617NEET 2019Medium

Logic Gates · Equivalent gate & universal gates

The correct Boolean operation represented by the circuit diagram drawn is:

Figure

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Answer: (b)

  1. Switches AA and BB are in series and together short the LED to ground.
  2. The LED is shorted (Y=0Y=0) only when both are closed.
  3. In every other case it glows: Y=AB‾Y = \overline{AB}.
  4. So the answer is (b) NAND.
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Q618JEE Main 2019 · 9 APR · SHIFT 2Medium

Logic Gates · Equivalent gate & universal gates

The logic gate equivalent to the given logic circuit is :-

Figure

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Answer: (d)

  1. The NOT gates give Aˉ\bar{A} and Bˉ\bar{B}, which feed a NAND gate.
  2. Y=Aˉ⋅Bˉ‾=A+BY = \overline{\bar{A} \cdot \bar{B}} = A + B (De Morgan).
  3. So the answer is (d) OR.
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Q619NEET 2018Medium

Logic Gates · Boolean output of a circuit

In the combination of the following gates the output Y can be written in terms of inputs A and B as

Figure

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Answer: (b)

  1. Upper AND gets A and Bˉ\bar{B}: A⋅BˉA \cdot \bar{B}.
  2. Lower AND gets Aˉ\bar{A} and B: Aˉ⋅B\bar{A} \cdot B.
  3. OR gate: Y=A⋅Bˉ+Aˉ⋅BY = A \cdot \bar{B} + \bar{A} \cdot B (XOR).
  4. So the answer is (b).
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Q620JEE Main 2018 · 15 APR · SHIFT 2Medium

Logic Gates · Boolean output of a circuit

Truth table for the following digital circuit will be:

Figure

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Answer: (c)

  1. Upper AND: xyxy. Lower AND gets xˉ\bar{x} and yy: xˉy\bar{x}y.
  2. z=xy⋅xˉy‾=0‾=1z = \overline{xy\cdot \bar{x}y} = \overline{0} = 1 since xxˉ=0x\bar{x} = 0.
  3. Output is 1 for all four rows.
  4. So the answer is (c).
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Q621NEET 2017Medium

Logic Gates · Equivalent gate & universal gates

The given electrical network is equivalent to

Figure

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Answer: (b)

  1. First NOR: A+B‾\overline{A+B}.
  2. NOR with tied inputs is a NOT: A+BA+B.
  3. Final NOT: Y=A+B‾Y = \overline{A+B}.
  4. So the answer is (b) NOR gate.
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Q622JEE Main 2016 · 9 APR · SHIFT 1Easy

Logic Gates · Basic gates & truth tables

The truth table given in fig. represents:

Figure

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Answer: (b)

  1. From the table, Y=0Y = 0 only for A=B=0A = B = 0; if any input is 1, Y=1Y = 1.
  2. So Y=A+BY = A + B.
  3. So the answer is (b) OR - Gate.
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Q623NEET 2016 · PHASE 2Medium

Logic Gates · Boolean output of a circuit

What is the output Y in the following circuit, when all the three inputs A, B, C are first 0 and then 1?

Figure

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Answer: (c)

  1. P is AND, Q is NAND: Y=(A⋅B)⋅C‾Y = \overline{(A \cdot B) \cdot C}.
  2. All 0: Y=0‾=1Y = \overline{0} = 1. All 1: Y=1‾=0Y = \overline{1} = 0.
  3. So the answer is (c) 1, 0.
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Q624NEET 2016 · PHASE 1Medium

Logic Gates · Boolean output of a circuit

To get output 1 for the following circuit, the correct choice for the input is

Figure

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Answer: (b)

  1. OR then AND: Y=(A+B)⋅CY = (A + B) \cdot C.
  2. Y = 1 needs C=1C = 1 and at least one of A, B equal to 1.
  3. Only (b) has C=1C = 1: Y=(1+0)⋅1=1Y = (1 + 0) \cdot 1 = 1.
  4. So the answer is (b) A=1,B=0,C=1A = 1, B = 0, C = 1.
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Q625JEE Main 2016 · 10 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

To get an output of 1 from the circuit shown in figure the input must be:

Figure

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Answer: (c)

  1. Y=(a+b)⋅cY = (a + b)\cdot c.
  2. Need c=1c = 1 and at least one of a,b=1a, b = 1.
  3. (c) a=1,b=0,c=1a = 1, b = 0, c = 1: Y=(1+0)⋅1=1Y = (1 + 0)\cdot 1 = 1. Others give 0.
  4. So the answer is (c).
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Q626JEE Main 2016Medium

Logic Gates · Waveforms

If a,b,c,da, b, c, d are inputs to a gate and xx is its output, then, as per the following time graph, the gate is:

Figure

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Answer: (a)

  1. Output xx goes high at the first rise of dd, when only dd is 1.
  2. After that xx stays 1 even when a,b,c,da, b, c, d are not all 1, and at every instant at least one input is high.
  3. x=1x = 1 whenever any input is 1 is the behaviour of an OR gate.
  4. So the answer is (a) OR.
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Q627NEET 2015 · AIPMT · CANCELLED PAPERMedium

Logic Gates · Equivalent gate & universal gates

Which logic gate is represented by the following combination of logic gates?

Figure

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Answer: (a)

  1. NOT gates give Y1=AˉY_1 = \bar A, Y2=BˉY_2 = \bar B.
  2. NOR: Y=Aˉ+Bˉ‾=ABY = \overline{\bar A + \bar B} = AB.
  3. So the answer is (a) AND.
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Q628JEE Main 2014 · 9 APR · SHIFT 1Easy

Logic Gates · Equivalent gate & universal gates

Identify the gate and match A, B, Y in bracket to check.

Figure

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Answer: (a)

  1. First NAND: A⋅B‾\overline{A \cdot B}.
  2. Second NAND has its inputs shorted, so it acts as NOT: Y=A⋅B‾‾=A⋅BY = \overline{\overline{A \cdot B}} = A \cdot B.
  3. This is AND; check: A=1,B=1⇒Y=1A = 1, B = 1 \Rightarrow Y = 1.
  4. So the answer is (a) AND (A=1,B=1,Y=1A = 1, B = 1, Y = 1).
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Q629JEE Main 2014 · 19 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

Figure

Given: A and B are input terminals.

Logic 1 = > 5 V

Logic 0 = < 1 V

Which logic gate operation, the following circuit does?

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Answer: (a)

  1. Diode cathodes face the inputs; the output is held high by VccV_{cc} unless a diode conducts.
  2. If A or B is at logic 0 (below 1 V), that diode is forward biased and pulls VoutV_{out} low.
  3. Only with both A and B at logic 1 do both diodes stay off, so VoutV_{out} is high.
  4. Output 1 only when both inputs are 1. So the answer is (a) AND gate.
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Q630NEET 2013Easy

Logic Gates · NAND, NOR & XOR

The output from a NAND gate is divided into two in parallel and fed to another NAND gate. The resulting gate is a

Figure

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Answer: (a)

  1. First NAND: Y1=A⋅B‾Y_1 = \overline{A \cdot B}.
  2. Second NAND with both inputs Y1Y_1 acts as NOT: C=Y1‾C = \overline{Y_1}.
  3. C=A⋅B‾‾=A⋅BC = \overline{\overline{A \cdot B}} = A \cdot B.
  4. So the answer is (a) AND gate.
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Q631NEET 2013Medium

Logic Gates · Boolean output of a circuit

The output (X) of the logic circuit shown in figure will be

Figure

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Answer: (a)

  1. First NAND gives A⋅B‾\overline{A \cdot B}.
  2. Second NAND has both inputs joined, so it is a NOT gate: X=A⋅B‾‾=A⋅BX = \overline{\overline{A \cdot B}} = A \cdot B.
  3. So the answer is (a) X=A⋅BX = A \cdot B.
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Q632JEE Main 2013 · 25 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

Which of the following circuits correctly represents the following truth table?

Figure

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Answer: (a)

  1. From the table, C=1C = 1 only for A=1,B=0A = 1, B = 0: C=ABˉC = A\bar{B}.
  2. (a): NOR of Aˉ\bar{A} and ABAB: C=A⋅AB‾=A(Aˉ+Bˉ)=ABˉC = A\cdot\overline{AB} = A(\bar{A} + \bar{B}) = A\bar{B}. Matches.
  3. (b) gives B(A+B)=BB(A + B) = B; (d) gives AB‾\overline{AB}; neither matches.
  4. So the answer is (a).
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Q633JEE Main 2013 · 23 APR · SHIFT 1Medium

Logic Gates · Boolean output of a circuit

A system of four gates is set up as shown. The 'truth table' corresponding to this system is:

Figure

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Answer: (a)

  1. First NOR: N=A+B‾N = \overline{A + B}. Then A+N‾\overline{A + N} and B+N‾\overline{B + N}, then a final NOR.
  2. 0000: N=1N = 1, both middle outputs 0, Y=1Y = 1.
  3. 0101: N=0N = 0, middle outputs 0‾=1\overline{0} = 1 and 1‾=0\overline{1} = 0, Y=0Y = 0; similarly 10→010 \to 0.
  4. 1111: N=0N = 0, both middle outputs 0, Y=1Y = 1. This is XNOR.
  5. Output column 1,0,0,11, 0, 0, 1. So the answer is (a).
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Q634JEE Main 2013 · 9 APR · SHIFT 1Difficult

Logic Gates · Boolean output of a circuit

Consider two npn transistors as shown in the figure. If 0 Volts corresponds to false and 5 Volts correspond to true, then the output at C corresponds to:

Figure

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Answer: (d)

  1. Both transistors have emitters grounded and collectors joined to C, so they are in parallel between C and ground.
  2. If A or B is 5 V, that transistor saturates and pulls C to about 0 V.
  3. Only when A = B = 0 are both cut off, and C = 5 V through the resistor.
  4. C=A+B‾C = \overline{A + B}, so the answer is (d) A NOR B.
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Q635NEET 2012 · AIPMT · PRELIMSEasy

Logic Gates · Waveforms

The figure shows a logic circuit with two inputs A and B and the output C. The voltage wave forms across A, B and C are as given. The logic circuit gate is

Figure

Show answer and solution

Answer: (a)

  1. Read each interval: 00 to t1t_1: A=0,B=0,C=0A = 0, B = 0, C = 0.
  2. t1t_1 to t2t_2: (1,0)→1(1,0) \to 1; t2t_2 to t3t_3: (1,1)→1(1,1) \to 1; t3t_3 to t4t_4: (0,1)→1(0,1) \to 1.
  3. t4t_4 to t5t_5: (0,0)→0(0,0) \to 0; t5t_5 to t6t_6: (1,0)→1(1,0) \to 1.
  4. C=0C = 0 only when both inputs are 0, so C=A+BC = A + B.
  5. So the answer is (a) OR gate.
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Q636NEET 2012 · AIPMT · MAINSMedium

Logic Gates · Boolean output of a circuit

To get an output Y= 1 in given circuit which of the following input will be correct?

Figure

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Answer: (b)

  1. OR then AND: Y=(A+B)⋅CY = (A + B) \cdot C.
  2. Y = 1 needs C=1C = 1 and A+B=1A + B = 1.
  3. Only (b) has C=1C = 1: Y=(1+0)⋅1=1Y = (1 + 0) \cdot 1 = 1.
  4. So the answer is (b).
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Q637JEE Main 2012 · AIEEEMedium

Logic Gates · Boolean output of a circuit

Truth table for system of four NANDNAND gates as shown in figure is:

Figure

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Answer: (a)

  1. First NAND: N=AB‾N = \overline{AB}; next: AN‾\overline{AN} and BN‾\overline{BN}.
  2. Final NAND: Y=AN+BN=(A+B)AB‾=ABˉ+AˉBY = AN + BN = (A + B)\overline{AB} = A\bar{B} + \bar{A}B (XOR).
  3. Rows: 00→000 \to 0, 01→101 \to 1, 10→110 \to 1, 11→011 \to 0.
  4. So the answer is (a).
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Q638NEET 2011 · AIPMT · PRELIMSEasy

Logic Gates · Basic gates & truth tables

Symbolic representation of four logic gates are shown as

Figure

Pick out which ones are for AND, NAND and NOT gates, respectively

Show answer and solution

Answer: (d)

  1. (i) curved input, pointed output: OR; (ii) triangle with bubble: NOT.
  2. (iii) D-shape without bubble: AND; (iv) D-shape with bubble: NAND.
  3. AND, NAND, NOT = (iii), (iv), (ii): answer (d).
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Q639NEET 2010 · AIPMT · MAINSEasy

Logic Gates · Waveforms

The following figure shows a logic gate circuit with two inputs A and B and the output Y. The voltage waveforms of A, B and Y are as given.

Figure

The logic gate is

Show answer and solution

Answer: (d)

  1. Compare YY with AA and BB in each time interval.
  2. YY goes LOW only in the interval where both AA and BB are HIGH; in every other interval YY is HIGH.
  3. That is Y=A⋅B‾Y = \overline{A \cdot B}.
  4. So the answer is (d) NAND gate.
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Q640NEET 2010 · AIPMT · PRELIMSMedium

Logic Gates · Boolean output of a circuit

To get an output Y = 1 in given circuit which of the following input will be correct?

Figure

Show answer and solution

Answer: (b)

  1. OR then AND: Y=(A+B)⋅CY = (A + B) \cdot C.
  2. Y = 1 needs C=1C = 1 and A+B=1A + B = 1.
  3. Only (b) has C=1C = 1: Y=(1+0)⋅1=1Y = (1 + 0) \cdot 1 = 1.
  4. So the answer is (b).
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Q641JEE Main 2010 · AIEEEMedium

Logic Gates · Equivalent gate & universal gates

The combination of gates shown below yields

Figure

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Answer: (a)

  1. NAND gates with joined inputs act as NOT, giving Aˉ\bar{A} and Bˉ\bar{B}.
  2. Final NAND: X=Aˉ Bˉ‾=A+BX = \overline{\bar{A}\,\bar{B}} = A + B.
  3. So the answer is (a) OR gate.
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Q642NEET 2009 · AIPMTEasy

Logic Gates · Basic gates & truth tables

The symbolic representation of four logic gates are given below

Figure

The logic symbols for OR, NOT and NAND gates are respectively

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Answer: (b)

  1. (i) D-shape with bubble: NAND; (ii) triangle with bubble: NOT.
  2. (iii) D-shape without bubble: AND; (iv) curved input, pointed output: OR.
  3. OR, NOT, NAND = (iv), (ii), (i): answer (b).
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Q643JEE Main 2009 · AIEEEMedium

Logic Gates · Waveforms

The logic circuit shown below has the input waveforms ’A’\text{'}A\text{'} and ’B’\text{'}B\text{'} as shown. Pick out the correct output waveform.

Figure

Figure

Output is

Show answer and solution

Answer: (d)

  1. The NOT gates give Aˉ\bar{A} and Bˉ\bar{B}, and the NOR gives Y=Aˉ+Bˉ‾=A⋅BY = \overline{\bar{A} + \bar{B}} = A \cdot B (AND).
  2. So Y=1Y = 1 only in the intervals where both AA and BB are high.
  3. That happens in the first interval and in the interval where the second A pulse overlaps a B pulse; elsewhere Y=0Y = 0.
  4. So the answer is (d).
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Q644JEE Main 2008 · AIEEEMedium

Logic Gates · Boolean output of a circuit

In the circuit below, AA and BB represent two inputs and CC represents the output.

Figure

The circuit represents

Show answer and solution

Answer: (d)

  1. Both diodes point toward the output; the resistor goes to ground.
  2. If A or B is high, its diode conducts and C becomes high.
  3. C is low only when both A and B are low: C=A+BC = A + B.
  4. So the answer is (d) OR gate.
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Q645NEET 2008 · AIPMTMedium

Logic Gates · Equivalent gate & universal gates

The circuit is equivalent to

Figure

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Answer: (a)

  1. NOR gives A+B‾\overline{A+B}.
  2. NAND with tied inputs is a NOT: A+BA+B.
  3. Final NOT: Y=A+B‾Y = \overline{A+B}.
  4. So the answer is (a) NOR gate.
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Q646NEET 2007 · AIPMTMedium

Logic Gates · Boolean output of a circuit

In the following circuit, the output Y for all possible inputs A and B is expressed by the truth table.

Figure

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Answer: (c)

  1. First NOR gives A+B‾\overline{A + B}.
  2. Second NOR has both inputs joined, so it acts as NOT: Y=A+B‾‾=A+BY = \overline{\overline{A + B}} = A + B.
  3. OR table: Y=0,1,1,1Y = 0, 1, 1, 1 for AB=00,01,10,11AB = 00, 01, 10, 11.
  4. So the answer is (c).
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Q647NEET 2006 · AIPMTEasy

Logic Gates · Waveforms

The following figure shows a logic gate circuit with two inputs A and B and the output C.

Figure

The voltage waveforms of A, B and C are as shown below.

Figure

The logic circuit gate is

Show answer and solution

Answer: (b)

  1. First pulse: A=1,B=1⇒C=1A = 1, B = 1 \Rightarrow C = 1.
  2. Second AA pulse: B=0B = 0 there, so C=0C = 0; when only B=1B = 1 (A = 0), C=0C = 0 too.
  3. Third pulse: A=1,B=1⇒C=1A = 1, B = 1 \Rightarrow C = 1.
  4. C=1C = 1 only when both inputs are 1, so C=A⋅BC = A \cdot B.
  5. So the answer is (b) AND gate.
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Q648NEET 2004 · AIPMTEasy

Logic Gates · Basic gates & truth tables

The output of OR gate is 1

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Answer: (b)

  1. OR: Y=A+BY = A + B, which is 1 when at least one input is 1.
  2. So the answer is (b) if either or both inputs are 1.
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Q649NEET 2003 · AIPMTMedium

Logic Gates · Equivalent gate & universal gates

Following diagram performs the logic function of

Figure

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Answer: (b)

  1. First NAND: AB‾\overline{AB}.
  2. Second NAND has its inputs joined, so it acts as NOT: Y=AB‾‾=ABY = \overline{\overline{AB}} = AB.
  3. So the answer is (b) AND gate.
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Q650NEET 2002 · AIPMTEasy

Logic Gates · Basic gates & truth tables

The given truth table is for which logic gate

ABYA \quad B \quad Y

1101 \quad 1 \quad 0

0110 \quad 1 \quad 1

1011 \quad 0 \quad 1

0010 \quad 0 \quad 1

Show answer and solution

Answer: (a)

  1. Read the table: Y=0Y = 0 only for A=1,B=1A = 1, B = 1; for every other input Y=1Y = 1.
  2. This is the complement of AND: Y=A⋅B‾Y = \overline{A \cdot B}.
  3. So the answer is (a) NAND.
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Q651NEET 2001 · AIPMTEasy

Logic Gates · Basic gates & truth tables

The given truth table is for which logic gate

ABYA \quad B \quad Y

1101 \quad 1 \quad 0

0110 \quad 1 \quad 1

1011 \quad 0 \quad 1

0010 \quad 0 \quad 1

Show answer and solution

Answer: (a)

  1. Read the table: Y=0Y = 0 only for A=1,B=1A = 1, B = 1; for every other input Y=1Y = 1.
  2. This is the complement of AND: Y=A⋅B‾Y = \overline{A \cdot B}.
  3. So the answer is (a) NAND.
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Q652NEET 2000 · AIPMTEasy

Logic Gates · Basic gates & truth tables

The truth table given below

Figure

represents

Show answer and solution

Answer: (a)

  1. From the table, Y=1Y = 1 only when A=1A = 1 and B=1B = 1; otherwise Y=0Y = 0.
  2. That is Y=A⋅BY = A \cdot B.
  3. So the answer is (a) AND gate.
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Q653NEET 1999 · AIPMTMedium

Logic Gates · Equivalent gate & universal gates

The following circuit represents

Figure

Show answer and solution

Answer: (b)

  1. Upper AND gets Aˉ\bar A and BB: AˉB\bar A B.
  2. Lower AND gets AA and Bˉ\bar B: ABˉA\bar B.
  3. OR: Y=AˉB+ABˉY = \bar A B + A \bar B.
  4. So the answer is (b) XOR gate.
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Q654NEET 1998 · AIPMTEasy

Logic Gates · Basic gates & truth tables

Which one of the following gates will have an output of 1?

Show answer and solution

Answer: (c)

  1. (a) NAND with 1,11, 1: 1⋅1‾=0\overline{1 \cdot 1} = 0.
  2. (b) NOR with 1,11, 1: 1+1‾=0\overline{1 + 1} = 0.
  3. (c) NAND with 0,10, 1: 0⋅1‾=1\overline{0 \cdot 1} = 1.
  4. (d) XOR with 0,00, 0: 0⊕0=00 \oplus 0 = 0.
  5. So the answer is (c).
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Q655NEET 1998 · AIPMTEasy

Logic Gates · Basic gates & truth tables

The truth table given below is for which gate?

Figure

Show answer and solution

Answer: (d)

  1. From the table, C=0C = 0 only for A=B=1A = B = 1; all other rows give C=1C = 1.
  2. So C=A⋅B‾C = \overline{A \cdot B}.
  3. So the answer is (d) NAND.
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Q656NEET 1997 · AIPMTEasy

Logic Gates · Basic gates & truth tables

The following truth-table belongs to which one of the following four gates?

Figure

Show answer and solution

Answer: (b)

  1. From the table, Y=1Y = 1 only for A=B=0A = B = 0; any input 1 gives Y=0Y = 0.
  2. So Y=A+B‾Y = \overline{A + B}.
  3. So the answer is (b) NOR.
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Q657NEET 1996 · AIPMTEasy

Logic Gates · Basic gates & truth tables

This symbol represents

Figure

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Answer: (c)

  1. The symbol is an AND gate body with a bubble (inversion) at the output.
  2. So Y=A⋅B‾Y = \overline{A \cdot B}.
  3. So the answer is (c) NAND gate.
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Q658NEET 1995 · AIPMTEasy

Logic Gates · Basic gates & truth tables

The following truth-table belongs to which one of the following four gates?

Figure

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Answer: (b)

  1. From the table, Y=1Y = 1 only for A=B=0A = B = 0; any input 1 gives Y=0Y = 0.
  2. So Y=A+B‾Y = \overline{A + B}.
  3. So the answer is (b) NOR.
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Q659NEET 1994 · AIPMTEasy

Logic Gates · Basic gates & truth tables

The given truth table is for which logic gate?

Figure

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Answer: (a)

  1. From the table, Y=0Y = 0 only for A=B=1A = B = 1; all other rows give Y=1Y = 1.
  2. So Y=A⋅B‾Y = \overline{A \cdot B}.
  3. So the answer is (a) NAND.
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Q660NEET 1991 · AIPMTEasy

Logic Gates · Basic gates & truth tables

The following truth table corresponds to the logical gate

Figure

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Answer: (b)

  1. From the table, Y=0Y = 0 only for A=B=0A = B = 0; if any input is 1, Y=1Y = 1.
  2. So Y=A+BY = A + B.
  3. So the answer is (b) OR.
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Q661NEET 2010 · AIPMT · PRELIMSEasy

Other / Mixed · Crystal structure & bonding

Which one of the following bonds produces a solid that reflects light in the visible region and whose electrical conductivity decreases with temperature and has high melting point?

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Answer: (a)

  1. Metals reflect visible light because free electrons absorb and re-emit it (metallic lustre).
  2. In metals, resistance rises with temperature because lattice vibrations scatter electrons more, so conductivity falls.
  3. Metallic bonding is strong in most metals, so they have high melting points.
  4. So the answer is (a) metallic bonding.
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Q662NEET 2010 · AIPMT · PRELIMSEasy

Other / Mixed · Valves & IC

The device that can act as a complete electronic circuit is

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Answer: (b)

  1. An integrated circuit has diodes, transistors, resistors and capacitors all built on one semiconductor chip and connected together.
  2. A diode, transistor or Zener diode alone is only a single component.
  3. So the answer is (b) integrated circuit.
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Q663NEET 2009 · AIPMTMedium

Other / Mixed · Crystal structure & bonding

{} Sodium has body centred packing. Distance between two nearest atoms is 3.7 A˚\text{\AA}. The lattice parameter is

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Answer: (a)

  1. In BCC, nearest atoms touch along the body diagonal: d=32ad = \frac{\sqrt{3}}{2}a.
  2. a=2d3=2×3.71.732a = \frac{2d}{\sqrt{3}} = \frac{2 \times 3.7}{1.732}
  3. a≈4.27≈4.3 A˚a \approx 4.27 \approx 4.3\ \text{\AA}
  4. So the answer is (a) 4.3 A˚\text{\AA}.
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Q664NEET 2008 · AIPMTMedium

Other / Mixed · Crystal structure & bonding

If the lattice parameter for a crystalline structure is 3.6 A˚\text{\AA}, then the atomic radius in fcc crystal is

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Answer: (b)

  1. In FCC, atoms touch along the face diagonal: 4r=2a4r = \sqrt{2}a, so r=a22r = \frac{a}{2\sqrt{2}}.
  2. r=3.62×1.414=3.62.828r = \frac{3.6}{2 \times 1.414} = \frac{3.6}{2.828}
  3. r≈1.27 A˚r \approx 1.27\ \text{\AA}
  4. So the answer is (b) 1.27 A˚\text{\AA}.
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Q665NEET 2007 · AIPMTEasy

Other / Mixed · Crystal structure & bonding

For a cubic crystal structure which one of the following relations indicating the cell characteristics is correct?

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Answer: (c)

  1. In a cubic cell all three edges are equal: a=b=ca = b = c.
  2. All three axial angles are right angles: α=β=γ=90∘\alpha = \beta = \gamma = 90^\circ.
  3. So the answer is (c).
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Q666JEE Main 2006 · AIEEEMedium

Other / Mixed · Crystal structure & bonding

A solid which is not transparent to visible light and whose conductivity increases with temperature is formed by

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Answer: (b)

  1. Conductivity rising with temperature is the behaviour of a semiconductor such as Si or Ge.
  2. Si and Ge are opaque to visible light, and their atoms are held by covalent bonds.
  3. Metals lose conductivity when heated, and ionic or van der Waals solids are insulators.
  4. So the answer is (b) Covalent bonding.
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Q667NEET 2005 · AIPMTMedium

Other / Mixed · Crystal structure & bonding

{} Copper has face centered cubic (fcc) lattice with interatomic spacing equal to 2.54 A˚\text{\AA}. The value of lattice constant for this lattice is

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Answer: (b)

  1. In FCC, nearest-neighbour (interatomic) spacing is half the face diagonal: d=a2d = \frac{a}{\sqrt{2}}.
  2. a=2 d=1.414×2.54a = \sqrt{2}\,d = 1.414 \times 2.54
  3. a≈3.59 A˚a \approx 3.59\ \text{\AA}
  4. So the answer is (b) 3.59 A˚\text{\AA}.
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Q668NEET 2002 · AIPMTEasy

Other / Mixed · Crystal structure & bonding

Number of atom per unit cell in B.C.C.

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Answer: (c)

  1. BCC: 8 corner atoms, each shared by 8 cells, plus 1 body-centre atom.
  2. n=8×18+1=2n = 8 \times \frac{1}{8} + 1 = 2
  3. So the answer is (c) 2.
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Q669NEET 2001 · AIPMTMedium

Other / Mixed · Crystal structure & bonding

In bcc structure of lattice constant aa, the minimum distance between atoms is

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Answer: (a)

  1. In BCC, the body-centre atom touches the corner atoms along the body diagonal of length 3a\sqrt{3}a.
  2. The centre lies at the midpoint, so the minimum distance is 3a2\frac{\sqrt{3}a}{2}.
  3. So the answer is (a) 32a\frac{\sqrt{3}}{2}a.
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Q670NEET 1999 · AIPMTMedium

Other / Mixed · Crystal structure & bonding

Sodium has body centred packing. If the distance between two nearest atoms is 3.7 Å then the lattice parameter is

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Answer: (c)

  1. For BCC, nearest-neighbour distance d=32ad = \frac{\sqrt{3}}{2}a.
  2. a=2×3.73=7.41.732a = \frac{2 \times 3.7}{\sqrt{3}} = \frac{7.4}{1.732}
  3. a≈4.27≈4.3a \approx 4.27 \approx 4.3 Å
  4. So the answer is (c) 4.3 Å.
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Q671NEET 1996 · AIPMTEasyOld syllabus

Other / Mixed · Valves & IC

When using a triode, as an amplifier, the electrons are emitted by

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Answer: (b)

  1. In a triode the heated cathode emits electrons by thermionic emission.
  2. The grid is kept negative, so it controls the electron flow but collects none; the positive anode (plate) collects them.
  3. So the answer is (b) cathode and collected by the anode only.
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Q672NEET 1995 · AIPMTMediumOld syllabus

Other / Mixed · Crystal structure & bonding

Distance between body centred atom and a corner atom in sodium (a=4.225a = 4.225 Å) is

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Answer: (c)

  1. Body centre to corner is half the body diagonal: d=32ad = \frac{\sqrt{3}}{2}a.
  2. d=0.866×4.225d = 0.866 \times 4.225
  3. d≈3.66d \approx 3.66 Å
  4. So the answer is (c) 3.66 Å.
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Q673NEET 1993 · AIPMTEasyOld syllabus

Other / Mixed · Crystal structure & bonding

Diamond is very hard because

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Answer: (b)

  1. Hardness depends on how strongly atoms are held together, i.e. the cohesive (binding) energy.
  2. In diamond each carbon is bonded to four others by strong covalent bonds in a 3D network, so its cohesive energy is very large.
  3. So the answer is (b) it has large cohesive energy.
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Q674NEET 1992 · AIPMTEasyOld syllabus

Other / Mixed · Crystal structure & bonding

Which one of the following is the weakest kind of the bonding in solids?

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Answer: (c)

  1. Ionic, covalent and metallic bonds have binding energies of a few eV per atom.
  2. Van der Waals forces come from weak induced dipole attractions, about 0.01–0.1 eV, much weaker.
  3. So the answer is (c) van der Waals.
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Q675NEET 1992 · AIPMTEasyOld syllabus

Other / Mixed · Valves & IC

For amplification by a triode, the signal to be amplified is given to

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Answer: (b)

  1. The grid is close to the cathode, so a small change in grid voltage causes a large change in plate current.
  2. That is why the input signal is applied between grid and cathode, and the amplified output is taken from the plate circuit.
  3. So the answer is (b) the grid.
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Q676NEET 1992 · AIPMTMediumOld syllabus

Other / Mixed · Valves & IC

For an electronic valve, the plate current II and plate voltage VV in the space charge limited region are related as

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Answer: (a)

  1. In the space-charge-limited region the plate current obeys the Child–Langmuir law.
  2. I=kV3/2I = kV^{3/2}
  3. So the answer is (a) I∝V3/2I \propto V^{3/2}.
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Q677NEET 1990 · AIPMTEasyOld syllabus

Other / Mixed · Valves & IC

When a triode is used as an amplifier the phase difference between the input signal voltage and the output is

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Answer: (b)

  1. A more positive grid voltage increases the plate current IpI_p.
  2. Larger IpI_p means a larger drop across the load, so the plate voltage Vp=Vpp−IpRLV_p = V_{pp} - I_p R_L falls.
  3. Output therefore goes down when input goes up: phase difference π\pi.
  4. So the answer is (b) π\pi.
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